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| 型號(hào)： | TLV2548MPWREP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | GREEN, PLASTIC, TSSOP-20 |
| 文件頁(yè)數(shù)： | 36/37頁(yè) |
| 文件大小： | 915K |
| 代理商： | TLV2548MPWREP |
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SLAS668 – OCTOBER 2009
www.ti.com
Repeat Mode (Mode 01)
Repeat mode (mode 01) uses the FIFO. This mode setup requires configuration cycle and channel select cycle.
Once the programmed FIFO threshold is reached, the FIFO must be read, or the data is lost when the sequence
starts over again with the SELECT cycle and series of triggers. No configuration is required except for
re-selecting the channel unless the operation mode is changed. This allows the host to set up the converter and
continue monitoring a fixed input and come back to get a set of samples when preferred.
Triggered by CSTART: The first conversion can be started with a select cycle or CSTART. To do so, the user
can issue CSTART during the select cycle, immediately after the 4-bit channel select command. The first sample
started as soon as the select cycle is finished (i.e., CS returns to 1). If there is enough time (2
μs) left between
the SELECT cycle and the following CSTART, a conversion is carried out. In this case, you need one less trigger
to fill the FIFO. Succeeding samples are triggered by CSTART.
Sweep Mode (Mode 10)
Sweep mode (mode 10) also uses the FIFO. Once it is programmed in this mode, all of the channels listed in the
selected sweep sequence are visited in sequence. The results are converted and stored in the FIFO. This sweep
sequence may not be completed if the FIFO threshold is reached before the list is completed. This allows the
system designer to change the sweep sequence length. Once the FIFO has reached its programmed threshold,
an interrupt (INT) is generated. The host must issue a read FIFO command to read and clear the FIFO before
the next sweep can start.
Repeat Sweep Mode (Mode 11)
Repeat sweep mode (mode 11) works the same way as mode 10 except the operation has an option to continue
even if the FIFO threshold is reached. Once the FIFO has reached its programmed threshold, an interrupt (INT)
is generated. Then two things may happen:
1. The host may choose to act on it (read the FIFO) or ignore it. If the next cycle is a read FIFO cycle, all of the
data stored in the FIFO is retained until it has been read in order.
2. If the next cycle is not a read FIFO cycle, or another CSTART is generated, all of the content stored in the
FIFO is cleared before the next conversion result is stored in the FIFO, and the sweep is continued.
Table 6. TLV2548 Conversion Mode(1) (2) (3)
CONVERSION
CFR
SAMPLING
OPERATION
MODE
D(6,5)
TYPE
Single conversion from a selected channel
CS or FS to start select/sampling/conversion/read
Normal
One INT or EOC generated after each conversion
Host must serve INT by selecting channel, and converting and reading the
previous output.
One shot
00
Single conversion from a selected channel
CS to select/read
CSTART to start sampling and conversion
Extended
One INT or EOC generated after each conversion
Host must serve INT by selecting next channel and reading the previous
output.
(1)
Programming the EOC/INT pin as the EOC signal works for mode 00 only. The other three modes automatically generate an INT signal
irrespective of how EOC/INT is programmed.
(2)
Extended sampling mode using CSTART as the trigger only works when internal reference is selected for conversion modes 01, 10, and
11.
(3)
When using CSTART to sample in extended mode, the falling edge of the next CSTART trigger should occur no more than 2.5
μs after
the falling CS edge (or falling FS edge if FS is active) of the channel select cycle. This is to prevent an ongoing conversion from being
canceled.
8
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TLV2548-EP
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