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參數(shù)資料
型號(hào)： TLV320ADC3101IRGET
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQCC24
封裝： GREEN, PLASTIC, VQFN-24
文件頁數(shù)： 63/84頁
文件大小： 1363K
代理商： TLV320ADC3101IRGET
SLAS553A – NOVEMBER 2008 – REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com
Page 1 / Register 55: Right ADC Input selection for Right PGA
READ/
RESET
BIT
DESCRIPTION(1)
WRITE
VALUE
D7–D6
R/W
11
RCH_SEL4; Differential Pair Using the IN2R(P) as PLUS and IN3R(M) as MINUS Inputs.
00: 0-dB setting is chosen.
01: –6-dB setting is chosen.
10–11: Not connected to the right ADC PGA.
D5–D4
R/W
11
RCH_SEL3; Used for the IN3R(M) Pin, Which Is Single-Ended
00: 0-dB setting is chosen.
01: –6-dB setting is chosen.
10–11: Not connected to the right ADC PGA.
D3–D2
R/W
11
RCH_SEL2; Used for the IN2R(P) Pin, Which Is Single-Ended
00: 0-dB setting is chosen.
01: –6-dB setting is chosen.
10–11: Not connected to the right ADC PGA.
D1–D0
R/W
11
RCH_SEL1; Used for the IN1R(M) Pin, Which Is Single-Ended
00: 0-dB setting is chosen.
01: –6-dB setting is chosen.
10–11: Not connected to the right ADC PGA.
(1)
To maintain the same PGA output level for both single-ended and differential pairs, the single-ended inputs have a 2× gain applied.
Page 1 / Register 56: Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R
XXXX XXXX
Reserved. Do not write to this register.
Page 1 / Register 57: Right ADC Input selection for Right PGA
READ/
RESET
BIT
DESCRIPTION(1)
WRITE
VALUE
D7
R/W
0
0: Do not bypass right PGA.
1: Bypass right PGA, unbuffered differential pair using the IN2R(P) as PLUS and IN3R(M) as MINUS
inputs.
D6
R/W
0
RCH_SELCM
0: Right ADC channel unselected inputs are not biased weakly to the ADC common-mode voltage.
1: Right ADC channel unselected inputs are biased weakly to the ADC common-mode voltage.
D5–D4
R/W
11
RCH_SEL3X; Differential Pair Using the IN1L(P) as PLUS and IN1R(M) as MINUS Inputs.
00: 0-dB setting is chosen.
01: –6 dB setting is chosen.
10–11: Not connected to the right ADC PGA
D3–D2
R/W
11
RCH_SEL2X; Differential Pair Using the IN2L(P) as PLUS and IN3L(M) as MINUS Inputs.
00: 0-dB setting is chosen.
01: –6-dB setting is chosen.
10–11: Not connected to the right ADC PGA
D1–D0
R/W
11
RCH_SEL1X; Used for the IN1L(P) Pin, Which Is Single-Ended
00: 0-dB setting is chosen.
01: –6-dB setting is chosen.
10–11: Not connected to the right ADC PGA
(1)
To maintain the same PGA output level for both single-ended and differential pairs, the single-ended inputs have a 2× gain applied.
Page 1 / Register 58: Reserved
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7–D0
R
XXXX XXXX
Reserved. Do not write to this register.
66
Copyright 2008–2009, Texas Instruments Incorporated
Product Folder Link(s) :TLV320ADC3101
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參數(shù)描述
TLV320AIC10 制造商:TI 制造商全稱:Texas Instruments 功能描述:General-Purpose 3V to 5.5V 16-bit 22-KSPS DSP CODEC
TLV320AIC10C 制造商:TI 制造商全稱:Texas Instruments 功能描述:General-Purpose 3V to 5.5V 16-bit 22-KSPS DSP CODEC
TLV320AIC10CGQER 功能描述:接口—CODEC 16-Bit 22-KSPS DSP Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC10CPFB 功能描述:接口—CODEC 16-Bit 22-KSPS DSP Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC10CPFBG4 功能描述:接口—CODEC 16-Bit Reg Trnscvr With 3-State Outputs RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
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