- 您現在的位置：買賣IC網 > PDF目錄98252 > TLV320AIC11CPFB (TEXAS INSTRUMENTS INC) SPECIALTY CONSUMER CIRCUIT, PQFP48 PDF資料下載
參數資料
| 型號： | TLV320AIC11CPFB |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | GREEN, PLASTIC, TQFP-48 |
| 文件頁數： | 15/55頁 |
| 文件大小： | 263K |
| 代理商： | TLV320AIC11CPFB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁
2–8
2.3
Clock Source
MCLK is the external master-clock input. The clock circuit generates and distributes the necessary clocks throughout
the device. When the device is in the master mode, SCLK and FS are output and derived from MCLK in order to
provide clocking of the serial communications between the device and a DSP (digital signal processor). When in the
slave mode, SCLK and FS are all inputs. The SCLK can be connected to a faster clock source to speed up serial
communication between the slave and the master while the internal clock is maintained at 256 clocks per FS period
for internal processing. In SPI mode, the device is a slave and SCLK is connected to the SPICLK source.
2.4
Data Out (DOUT)
DOUT is placed in the high-impedance state after completing transmission of the LSB. In primary communication the
data word is the ADC conversion result. In secondary communication the data in the register read results when
requested by the read/write (R/W) bit. If a register read is not requested, the low eight bits of the secondary word are
all zeroes. The state of the master/slave (M/S) terminal is reflected by the MSB in secondary communication (DOUT,
bit D15), and by the LSB in primary communication (DOUT, bit D0).
2.4.1
Data Out, Master Mode
In the master mode, DOUT is taken from the high-impedance state by the falling edge of the master frame-sync (FS).
The most significant data bit then appears first on DOUT.
2.4.2
Data Out, Slave Mode
In the slave mode, DOUT is taken from the high-impedance state by the falling edge of the external frame-sync (FS).
The most significant data bit then appears first on DOUT.
2.5
Data In (DIN)
In a primary communication, the data word is the input digital signal to the DAC channel. If (15+1)-bit data format is
used, the LSB (D0) is used to request a secondary communication. In a secondary communication, the data is the
control and configuration data that sets the device for a particular function (see Section 3, Serial Communications).
The LSB of control register 1 determines whether it is a 15-bit or a 16-bit input.
2.6
FC (Hardware Secondary Communication Request)
The FC input provides for hardware requests for secondary communications. FC works in conjunction with the LSB
of the primary data word. FC should be tied low if not used.
2.7
Frame-Sync Function for TLV320AIC11
The frame-sync signal (FS) indicates the device is ready to send or receive data. FS is an output if the M/S pin is
connected to HI (master mode), and an input if the M/S pin is connected to LO (slave mode). The output FSD is a
delay version of the first frame-sync signal (FS) that is output 32 SCLKs after the first FS, and serves as the
frame-sync input to the next slave (see Figure 2–17). The data transferred out of DOUT and into DIN begins on the
falling edge of the FS signal. It can be configured as a frame or as a pulse signal, as determined by pins M0 and M1.
In normal operation, the digital serial interface consists of the shift clock (SCLK), the frame-sync signal (FS), the
ADC-channel data output (DOUT), and the DAC-channel data input (DIN). During the primary frame-synchronization
interval, SCLK clocks the ADC channel results out through DOUT, and clocks 16-bit/(15+1) DAC data in through DIN.
During the secondary frame-synchronization interval, SCLK clocks the register data out through DOUT in normal
operation. If the read bit (D12) is set to 1 and the device transfers control and device parameter in through DOUT.
The timing sequence is shown in Figures 2-1, 2-2, 2-3, and 2-4.
相關PDF資料 |
PDF描述 |
|---|---|
| TLV320AIC11IPFB | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| TLV320AIC11CPFBG4 | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| TLV320A11IPFBG4 | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| TLV320AIC11IPFBG4 | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| TLV320AIC13C | SPECIALTY CONSUMER CIRCUIT, PDSO30 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TLV320AIC11CPFBG4 | 功能描述:接口—CODEC 16-BIT D-TYPE LATCH RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC11EVM | 功能描述:音頻 IC 開發工具 TLV320AIC11 Eval Mod RoHS:否 制造商:Texas Instruments 產品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| TLV320AIC11I | 制造商:TI 制造商全稱:Texas Instruments 功能描述:General-Purpose Low-Voltage 1.1V to 3.6V/0 16-bit 22-KSPS DSP CODEC |
| TLV320AIC11IPFB | 功能描述:接口—CODEC Gen Purp Lo-I/O Vltg 16-Bit 22-KSPS DSP RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC11IPFBG4 | 功能描述:接口—CODEC 12-Bit To 24-Bit Reg Bus Exchg W/3-St Otp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
發布緊急采購，3分鐘左右您將得到回復。