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參數資料
| 型號： | TLV320AIC14C |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO30 |
| 封裝： | PLASTIC, TSSOP-30 |
| 文件頁數： | 4/54頁 |
| 文件大小： | 450K |
| 代理商： | TLV320AIC14C |
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2–1
2 Terminal Descriptions
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
IOVSS
IOVDD
FSD
FS
DOUT
DIN
M/S
PWRDN
OUTM1
OUTP1
DRVDD
DRVSS
NC
DVSS
DVDD
SCLK
SDA
SCL
MCLK
RESET
INP1
INM1
BIAS
INM2
INP2
MICIN
AVDD
AVSS
DBT PACKAGE
(TOP VIEW)
2.1
Ordering Information
TA
30-TSSOP DBT PACKAGE
0
°C to 70°C
TLV320AIC14C
–40
°C to 85°C
TLV320AIC14I
2.2
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
AVDD
17
I
Analog power supply
AVSS
16
I
Analog ground
BIAS
21
O
Bias output voltage is software selectable between 1.35 V and 2.35 V. Its output current is 5 mA.
DIN
6
I
Data input. DIN receives the DAC input data and register data from the external DSP (digital signal processor) and is
synchronized to SCLK and FS. Data is latched at the falling edge of SCLK when FS is low.
DOUT
5
O
Data output. DOUT transmits the ADC output bits and registers data, and is synchronized to SCLK and FS. Data is
sent out at the rising edge of SCLK when FS is low. Outside data/control frame, DOUT is put in 3-state.
DRVDD
11
I
Analog power supply for the 600-
driver
DRVSS
12
I
Analog ground for the 600-
driver
DVDD
29
I
Digital power supply
DVSS
30
I
Digital ground
FS
4
I/O
Frame sync. When FS goes low, DIN begins receiving data bits and DOUT begins transmitting data bits. In master
mode, FS is internally generated and is low during the data transmission to DIN and from DOUT. In slave mode, FS is
externally generated.
FSD
3
O
Frame sync delayed output. The FSD output synchronizes a slave device to the frame sync of the master device. FSD
is applied to the slave FS input and is the same duration as the master FS signal. This pin must be pulled low if AIC14 is
a stand-alone slave. It may be pulled high if the AIC14 is a stand-alone master or the last slave in the cascade.
INM1
22
I
Inverting analog input 1. It must be connected to AVSS if not used.
INM2
20
I
Inverting analog input 2. It must be connected to AVSS if not used.
INP1
23
I
Noninverting analog input 1. It must be connected to AVSS if not used.
INP2
19
I
Noninverting analog input 2. It must be connected to AVSS if not used.
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