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參數資料
| 型號： | TLV320AIC27IPFB |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, TQFP-48 |
| 文件頁數： | 17/54頁 |
| 文件大小： | 732K |
| 代理商： | TLV320AIC27IPFB |
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TLV320AIC27
STEREO AUDIO CODEC
SLAS253A – MARCH 2000 – REVISED SEPTEMBER 2000
24
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
ac-link audio input frame (SDATA_IN) (continued)
SYNC
BIT_CLK
SDATA_IN
CODEC
READY
SLOT (1)
SLOT (2)
AIC27 SAMPLES
SYNC ASSERTION HERE
AC ’97 CONTROLLER
SAMPLES FIRST SDATA_IN
BIT OF FRAME HERE
END OF PREVIOUS AUDIO FRAME
Figure 12. Start of an Audio Input Frame
A new audio input frame begins with a low-to-high transition of SYNC, as illustrated in Figure 12. SYNC is
synchronous with the rising edge of BIT_CLK. The TLV320AIC27 samples the assertion of SYNC on the next
falling edge of BIT_CLK. This falling edge marks the time when both sides of the ac link are aware of the start
of a new audio frame. The AC’97 controller transitions SDATA_IN into the first bit position of slot 0 (valid frame
bit) on the next rising edge of BIT_CLK. Each new bit position is presented to the ac link on a rising edge of
BIT_CLK, and subsequently sampled by the AC’97 controller on the following falling edge of BIT_CLK. This
sequence ensures that data transitions and subsequent sample points for both incoming and outgoing data
streams are time-aligned.
SDATA_IN’s composite stream is MSB-justified (MSB first), with all invalid bit positions (for assigned and/or
unassigned time slots) stuffed with 0’s by the TLV320AIC27. SDATA_IN is sampled on the falling edges of
BIT_CLK.
slot 1: status address port
The status port is used to monitor the status of the TLV320AIC27 functions,, including, but not limited to, mixer
settings and power management. Audio input frame slot 1 echoes the control register index, for historical
reference, so that the data is returned to slot 2 (assuming that slots 1 and 2 had been tagged valid by the
TLV320AIC27 during slot 0).
Status Address Port Bit Assignments
Bit (19)
Reserved (stuffed with 0s)
Bit (18:12)
Control register index (echo of register index for which data is being returned)
Bit (11:0)
Reserved (stuffed with 0s)
The first bit (MSB) generated by the TLV320AIC27 is always stuffed with a 0. The following 7 bit positions
communicate the associated control register address, and the trailing 12 bit positions are stuffed with 0s by the
TLV320AIC27.
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相關代理商/技術參數 |
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