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參數(shù)資料
| 型號： | TLV320AIC28RGZ |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| 封裝： | 7 X 7 MM, PLASTIC, QFN-48 |
| 文件頁數(shù)： | 38/85頁 |
| 文件大小： | 1053K |
| 代理商： | TLV320AIC28RGZ |
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TLV320AIC28
SLAS418B FEBRUARY 2004 REVISED MAY 2005
www.ti.com
43
PAGE 1 CONTROL REGISTER MAP
REGISTER 00H: Auxiliary ADC Control
BIT
NAME
RESET
VALUE
READ/
WRITE
FUNCTION
D15
0
R
Reserved. The value of this bit should always be set to zero.
D14
ADST
1(for read)
0 (for write)
R/W
ADC STATUS.
READ
0 =>ADC is busy
1 => ADC is not busy (default).
WRITE
0 => Normal mode (default).
1 => Stop conversion and power down.
D13D10
ADCSM
0000
R/W
ADC Scan Mode.
0000 => No scan
0001 => Reserved
0010 => Reserved
0011 => Reserved
0100 => Reserved
0101 => Reserved
0110 => BAT input is converted and the results returned to the BAT data register.
0111 => AUX2 input is converted and the results returned to the AUX2 data register
1000 => AUX1 input is converted and the results returned to the AUX1 data register.
1001 => Auto Scan function: For AUX1, AUX2, TEMP1 or TEMP2 as chosen using control
register 0CH/page 1. Scan continues until stop bit is sent or D13D10 are changed.
1010 => TEMP1 input is converted and the results returned to the TEMP1 data register.
1011 => Port scan function: BAT, AUX1, AUX2 inputs are measured and the results returned to
the appropriate data registers.
1100 => TEMP2 input is converted and the results returned to the TEMP2 data register.
1101 => Reserved
1110 => Reserved
1111 => Reserved
D9D8
RESOL
00
R/W
Resolution Control. The ADC resolution is specified with these bits.
00 => 12-bit resolution
01 => 8-bit resolution
10 => 10-bit resolution
11 => 12-bit resolution
D7D6
ADAVG
00
R/W
Converter Averaging Control. These two bits allow user to specify the number of averages the
converter will perform selected by bit D0, which selects either Mean Filter or Median Filter.
Mean Filter
Median Filter
00 => No average
No average
01 => 4-data average
5-data average
10 => 8-data average
9-data average
11 => 16-data average
15-data average
D5D4
ADCR
00
R/W
Conversion Rate Control. These two bits specify the internal clock rate, which the ADC uses to
control performing a single conversion. These bits are the same whether reading or writing.
tconv +
N
) 4
INTCLK
Where fINTCLK is the internal clock frequency. For example, with 12-bit resolution and a 2 MHz
internal clock frequency, the conversion time is 8
s. This yields an effective throughput rate of
125 kHz.
00 => 8 MHz internal clock rate (use for 8-bit resolution only)
01 =>4 MHz internal clock rate (use for 8-bit/10-bit resolution only)
10 =>2 MHz internal clock rate
11 =>1 MHz internal clock rate
D3D1
0’s
R
Reserved
D0
AVGFS
0
R/W
Average Filter Select
0 => Mean Filter
1 => Median Filter
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