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參數資料
| 型號： | TLV320AIC3110IRHBR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | AUDIO AMPLIFIER, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數： | 106/126頁 |
| 文件大小： | 1528K |
| 代理商： | TLV320AIC3110IRHBR |
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SLAS647 – DECEMBER 2009
www.ti.com
6
REGISTER MAP
6.1
TLV320AIC3110 Register Map
All features on this device are addressed using the I2C bus. All of the writable registers can be read back.
However, some registers contain status information or data, and are available for reading only.
The TLV320AIC3110 contains several pages of 8-bit registers, and each page can contain up to 128
registers. The register pages are divided up based on functional blocks for this device. Page 0 is the
default home page after RESET. Page control is done by writing a new page value into register 0 of the
current page.
The control registers for the TLV320AIC3110 are described in detail as follows. All registers are 8 bits in
width, with D7 referring to the most-significant bit of each register, and D0 referring to the least-significant
bit.
Pages 0, 1, 3, 4, 8–9, 12–13 are available for use; however, all other pages and registers are reserved.
Do not read from or write to reserved pages and registers. Also, do not write other than the reset values
for the reserved bits and read-only bits of non-reserved registers; otherwise, device functionality failure
can occur.
Table 6-1. Summary of Register Map
Page Number
Description
0
Page 0 is the default page on power up. Configuration for serial interface, digital I/O, clocking, ADC, DAC settings, etc.
1
Configuration for analog PGAs, ADC, DAC, output drivers, volume controls, etc.
Register 16 controls the MCLK divider that controls the interrupt pulse duration, debounce timing, and detection block
3
clock
4
ADC AGC and filter coefficients
8–9
DAC Buffer A filter and DRC coefficients
12–13
DAC Buffer B filter and DRC coefficients
6.2
Control Registers, Page 0 (Default Page): Clock Multipliers, Dividers, Serial
Interfaces, Flags, Interrupts, and GPIOs
Page 0 / Register 0 (0x00): Page Control Register
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0000 0000
0000 0000: Page 0 selected
0000 0001: Page 1 selected
...
1111 1110: Page 254 selected
1111 1111: Page 255 selected
Page 0 / Register 1 (0x01): Software Reset
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D1
R/W
0000 000
Reserved. Write only zeros to these bits.
D0
R/W
0
0: Don't care
1: Self-clearing software reset for control register
Page 0 / Register 2 (0x02): Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R
XXXX XXXX
Reserved. Do not write to this register.
80
REGISTER MAP
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC3110
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| TLV320AIC3110IRHBT | 功能描述:接口—CODEC Low-Pwr Audio Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC3111 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power Audio Codec With Embedded miniDSP and Stereo Class-D Speaker Amplifier |
| TLV320AIC3111_101 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Low-Power Audio Codec With Embedded miniDSP and Stereo Class-D Speaker Amplifier |
| TLV320AIC3111EVM-K | 功能描述:音頻 IC 開發工具 TLV320AIC3111 Eval Mod RoHS:否 制造商:Texas Instruments 產品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| TLV320AIC3111IRHBR | 功能描述:接口—CODEC Low-Pwr Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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