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參數資料
| 型號： | TLV320AIC31IRHBR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數： | 19/83頁 |
| 文件大小： | 1197K |
| 代理商： | TLV320AIC31IRHBR |
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STEREO AUDIO ADC
SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008 ............................................................................................................................................. www.ti.com
Table 1 lists several example cases of typical MCLK rates and how to program the PLL to achieve FSref = 44.1
kHz or 48 kHz.
Table 1. TYPICAL MCLK RATES
FSref = 44.1 kHz
MCLK (MHz)
P
R
J
D
ACHIEVED FSref
% ERROR
2.8224
1
32
0
44100.00
0.0000
5.6448
1
16
0
44100.00
0.0000
12.0
1
7
5264
44100.00
0.0000
13.0
1
6
9474
44099.71
0.0007
16.0
1
5
6448
44100.00
0.0000
19.2
1
4
7040
44100.00
0.0000
19.68
1
4
5893
44100.30
–0.0007
48.0
4
1
7
5264
44100.00
0.0000
FSref = 48 kHz
MCLK (MHz)
P
R
J
D
ACHIEVED FSref
% ERROR
2.048
1
48
0
48000.00
0.0000
3.072
1
32
0
48000.00
0.0000
4.096
1
24
0
48000.00
0.0000
6.144
1
16
0
48000.00
0.0000
8.192
1
12
0
48000.00
0.0000
12.0
1
8
1920
48000.00
0.0000
13.0
1
7
5618
47999.71
0.0006
16.0
1
6
1440
48000.00
0.0000
19.2
1
5
1200
48000.00
0.0000
19.68
1
4
9951
47999.79
0.0004
48.0
4
1
8
1920
48000.00
0.0000
The TLV320AIC31 includes a stereo audio ADC, which uses a delta-sigma modulator with 128x oversampling in
single-rate mode, followed by a digital decimation filter. The ADC supports sampling rates from 8 kHz to 48 kHz
in single-rate mode, and up to 96 kHz in dual-rate mode. Whenever the ADC or DAC is in operation, the device
requires an audio master clock be provided and appropriate audio clock generation be setup within the part.
In order to provide optimal system power dissipation, the stereo ADC can be powered one channel at a time, to
support the case where only mono record capability is required. In addition, both channels can be fully powered
or entirely powered down.
The integrated digital decimation filter removes high-frequency content and downsamples the audio data from an
initial sampling rate of 128 FS to the final output sampling rate of FS. The decimation filter provides a linear phase
output response with a group delay of 17/FS. The –3 dB bandwidth of the decimation filter extends to 0.45 FS and
scales with the sample rate (FS). The filter has minimum 75dB attenuation over the stop band from 0.55 FS to 64
FS. Independent digital high-pass filters are also included with each ADC channel, with a corner frequency that
can be independently set to three different settings or can be disabled entirely.
Because of the oversampling nature of the audio ADC and the integrated digital decimation filtering,
requirements for analog anti-aliasing filtering are very relaxed. The TLV320AIC31 integrates a second order
analog anti-aliasing filter with 20-dB attenuation at 1 MHz. This filter, combined with the digital decimation filter,
provides sufficient anti-aliasing filtering without requiring additional external components.
The ADC is preceded by a programmable gain amplifier (PGA), which allows analog gain control from 0 dB to
59.5 dB in steps of 0.5 dB. The PGA gain changes are implemented with an internal soft-stepping algorithm that
only changes the actual volume level by one 0.5-dB step every one or two ADC output samples, depending on
the register programming (see registers Page-0/Reg-19 and Page-0/Reg-22). This soft-stepping ensures that
volume control changes occur smoothly with no audible artifacts. On reset, the PGA gain defaults to a mute
26
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC31
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相關代理商/技術參數 |
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| TLV320AIC31IRHBRG4 | 功能描述:接口—CODEC Lo-Pwr Ster Codec for Port Aud/Teleph RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC31IRHBT | 功能描述:接口—CODEC Lo-Pwr Ster Codec for Port Aud/Teleph RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC31IRHBT | 制造商:Texas Instruments 功能描述:IC CODEC STEREO AUDIO 32-VQFN |
| TLV320AIC31IRHBTG4 | 功能描述:接口—CODEC Lo-Pwr Ster Codec for Port Aud/Teleph RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC32 | 制造商:BB 制造商全稱:BB 功能描述:LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY |
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