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參數(shù)資料
型號(hào)： TLV320AIC31IRHBT
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQCC32
封裝： 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁(yè)數(shù)： 17/83頁(yè)
文件大小： 1197K
代理商： TLV320AIC31IRHBT
AUDIO CLOCK GENERATION
K*R/P
2/Q
PLL_CLKIN
CODEC
CODEC_CLKIN
PLL_OUT
K = J.D
J = 1,2,3,…..,62,63
D= 0000,0001,….,9998,9999
R= 1,2,3,4,….,15,16
P= 1,2,….,7,8
Q=2,3,…..,16,17
MCLK BCLK
CLKDIV_IN
PLL_IN
WCLK= Fsref/Ndac
ADC_FS
DAC_FS
Ndac=1,1.5,2,…..,5.5,6
DAC DRA => Ndac = 0.5
CODEC_CLK=256*Fsref
CLKDIV_OUT
1/8
PLLDIV_OUT
CLKDIV_CLKIN
SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008 ............................................................................................................................................. www.ti.com
The audio converters in the TLV320AIC31 need an internal audio master clock at a frequency of 256 × FSref,
which can be obtained in a variety of manners from an external clock signal applied to the device.
A more detailed diagram of the audio clock section of the TLV320AIC31 is shown in Figure 23.
Figure 23. Audio Clock Generation Processing
The part can accept an MCLK input from 512 kHz to 50 MHz, which can then be passed through either a
programmable divider or a PLL, to get the proper internal audio master clock needed by the part. The BCLK
input can also be used to generate the internal audio master clock.
A primary concern is proper operation of the codec at various sample rates with the limited MCLK frequencies
available in the system. This device includes a highly programmable PLL to accommodate such situations easily.
The integrated PLL can generate audio clocks from a wide variety of possible MCLK inputs, with particular focus
paid to the standard MCLK rates already widely used.
When the PLL is disabled,
FSref = CLKDIV_IN / (128 × Q)
Where Q = 2, 3, …, 17
CLKDIV_IN can be MCLK or BCLK, selected by Page 0, register 102, bits D7-D6.
NOTE: When NDAC = 1.5, 2.5, 3.5, 4.5, or 5.5, odd values of Q are not allowed. In this mode, MCLK can be as
high as 50 MHz, and FSref should fall within 39 kHz to 53 kHz.
24
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC31
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV320AIC31IRHBT 制造商:Texas Instruments 功能描述:IC CODEC STEREO AUDIO 32-VQFN
TLV320AIC31IRHBTG4 功能描述:接口—CODEC Lo-Pwr Ster Codec for Port Aud/Teleph RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC32 制造商:BB 制造商全稱(chēng):BB 功能描述:LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
TLV320AIC32_07 制造商:BB 制造商全稱(chēng):BB 功能描述:LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
TLV320AIC3204 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:Ultra Low Power Stereo Audio Codec
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