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參數資料
| 型號： | TLV320DA26IRHBG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, DAC WITH PROGRAMMABLE PLL, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數： | 14/52頁 |
| 文件大小： | 872K |
| 代理商： | TLV320DA26IRHBG4 |
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TLV320DAC26
SLAS428 AUGUST 2004
www.ti.com
21
’DAC26
HPR
HPL
VGND
Headphone Jack
’DAC26
HPR
HPL
VGND
Headphone Jack
Figure 15. Headphone Configurations, AC-Coupled (left) and Capless (right)
The audio output drivers in high power mode can also be configured to drive a mono differential signal into a speaker load
of 8-
minimum. The speaker load should be connected differentially between the HPR and HPL outputs. Several options
are possible for playback of DAC data in this case. If a stereo digital signal is available, this signal can be sent in normal
stereo fashion to the audio DAC. The programmable digital effects filters can then be used to invert one channel, so that
the signal applied across the speaker load is (LEFT + RIGHT), or effectively a mono-mix of the two channels. A simple
example of how to implement this inversion using the programmable filters is to set the coefficients as follows:
Leftchannel coefficients:
N0=32767, N1=0, N2=0, N3=32767, N4=0, N5=0
D1=0, D2=0, D4=0, D5=0
Rightchannel coefficients: N0=32767, N1=0, N2=0, N3=32767, N4=0, N5=0
D1=0, D2=0, D4=0, D5=0
This provides no spectral shaping; it only inverts the right channel relative to the left channel, such that the signals at HPL
and HPR are (LEFT) and (RIGHT), with the signal across the speaker then being LEFT+ RIGHT. In a general case when
spectral shaping is also desired, the inversion can be accomplished simply by setting N0, N1, and N2 coefficients of one
channel to the negative of the values set for the other channel. Note that the programmable filtering must be enabled by
setting bit D1/REG05H/Page2 to 1.
To enable the output drivers to deliver higher output power, the DAC output swing should be set to its highest level by setting
bit D10D9/REG06H/Page2 to 11. It is possible to increase power even further by disabling the built-in short-circuit
protection by programming bit D8 of Reg1DH/Page2 to 1. In this case care must be taken so a short-circuit at the output
does not occur. Figure 16 shows a typical jack configuration using a capless output configuration. In this configuration, the
’DAC26 drives the loudspeaker whenever headphones are not inserted in the jack and drives the headphones whenever
it is inserted in the jack.
’DAC26
HPR
HPL
VGND
Headphone Jack
Loud Speaker
Figure 16. Speaker Connection
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