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參數(shù)資料
| 型號(hào)： | TLV320DAC23IRHD |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 32-BIT DAC, PQCC28 |
| 封裝： | GREEN, PLASTIC, QFN-28 |
| 文件頁(yè)數(shù)： | 11/39頁(yè) |
| 文件大小： | 664K |
| 代理商： | TLV320DAC23IRHD |
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34
Digital Audio Interface Format (Address: 0000111)
BIT
D8
D7
D6
D5
D4
D3
D2
D1
D0
Function
X
MS
LRSWAP
LRP
IWL1
IWL0
FOR1
FOR0
Default
0
1
MS
Master/slave mode
0 = Slave
1 = Master
LRSWAP
DAC left/right swap
0 = Disabled
1 = Enabled
LRP
DAC left/right phase
0 = Right channel on, LRCIN high
1 = Right channel on, LRCIN low
IWL[1:0]
Input bit length
00 = 16 bit
01 = 20 bit
10 = 24 bit
11 = 32 bit
FOR[1:0]
Data format
11 = DSP format, frame sync followed by two data words
10 = I2S format, MSB first, left – 1 aligned
01 = MSB first, left aligned
00 = MSB first, right aligned
X
Reserved
NOTES:
1. In Master mode, the TLV320AIC23 supplies the BCLK and LRCIN. In Slave mode, BCLK and LRCIN are supplied to the
TLV320AIC23.
2. In normal mode, BCLK = MCLK/4 for all sample rates except for 88.2 kHz and 96 kHz. For 88.2 kHz and 96 kHz sample rate,
BCLK = MCLK.
3. In USB mode, bit BCLK = MCLK
Sample Rate Control (Address: 0001000)
BIT
D8
D7
D6
D5
D4
D3
D2
D1
D0
Function
X
CLKOUT
CLKIN
SR3
SR2
SR1
SR0
BOSR
USB/Normal
Default
0
CLKOUT
Clock output divider
0 = MCLK
1 = MCLK/2
CLKIN
Clock input divider
0 = MCLK
1 = MCLK/2
SR[3:0]
Sampling rate control (see Sections 3.3.2.1 AND 3.3.2.2)
BOSR
Base oversampling rate
USB mode:
0 = 250 fs
1 = 272 fs
Normal mode:
0 = 256 fs
1 = 384 fs
USB/Normal
Clock mode select:
0 =Normal
1 = USB
X
Reserved
Digital Interface Activation (Address: 0001001)
BIT
D8
D7
D6
D5
D4
D3
D2
D1
D0
Function
X
ACT
Default
0
ACT
Activate interface
0 = Inactive
1 = Active
X
Reserved
Reset Register (Address: 0001111)
BIT
D8
D7
D6
D5
D4
D3
D2
D1
D0
Function
RES
Default
0
RES
Write to this register triggers reset
3.2
Analog Interface
3.2.1
Line Inputs
The TLV320DAC23 has line inputs for the left and the right audio channels (RLINEIN and LLINEIN). Both line inputs
have independently programmable mutes. Active and passive filters for the two channels prevent high frequencies
from folding back into the audio band.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| TLV320DAC23IRHDG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Octal Buffer/Driver With 3-State Outputs RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC23IRHDR | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Low-Power Portable Aud Converter RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC23IRHDRG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Low-Power Portable Aud Converter RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC23PW | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Low-Power Portable Aud Converter RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC23PWG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Low-Power Portable Aud Converter RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
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