- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98254 > TLV320DAC23RHDR (TEXAS INSTRUMENTS INC) SERIAL INPUT LOADING, 32-BIT DAC, PQCC28 PDF資料下載
參數(shù)資料
| 型號： | TLV320DAC23RHDR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 32-BIT DAC, PQCC28 |
| 封裝： | GREEN, PLASTIC, QFN-28 |
| 文件頁數(shù)： | 8/39頁 |
| 文件大小： | 664K |
| 代理商： | TLV320DAC23RHDR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當(dāng)前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁
31
3 How to Use the DAC23
3.1
Control Interfaces
The TLV320DAC23 has many programmable features. The control interface is used to program the registers of the
device. The control interface complies with SPI (three-wire operation) and two-wire operation specifications. The
state of the MODE terminal selects the control interface type. The MODE pin must be hardwired to the required level.
MODE
INTERFACE
0
2-wire
1
SPI
3.1.1
SPI
In SPI mode, SDI carries the serial data, SCLK is the serial clock and CS latches the data word into the
TLV320DAC23. The interface is compatible with microcontrollers and DSPs with an SPI interface.
A control word consists of 16 bits, starting with the MSB. The data bits are latched on the rising edge of SCLK. A rising
edge on CS after the sixteenth rising clock edge latches the data word into the DAC (see Figure 3-1).
The control word is divided into two parts. The first part is the address block, the second part is the data block:
B[15:9]
Control address bits
B[8:0]
Control data bits
B15 B14 B13 B12 B11 B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
MSB
LSB
CS
SCLK
SDI
Figure 31. SPI Timing
3.1.2
2-Wire
In 2-wire mode, the data transfer uses SDI for the serial data and SCLK for the serial clock. The start condition is a
falling edge on SDIN while SCLK is high. The seven bits following the start condition determine the device on the
2-wire bus that receives the data. R/W determines the direction of the data transfer. The TLV320DAC23 is a write
only device and responds only if R/W is 0. The device operates only as a slave device whose address is selected
by setting the state of the CS pin as follows.
CS STATE
(Default = 0)
ADDRESS
0
0011010
1
0011011
The device that recognizes the address responds by pulling SDI low during the ninth clock cycle, acknowledging the
data transfer. The control follows in the next two eight-bit blocks. The stop condition after the data transfer is a rising
edge on SDI when SCLK is high (see Figure 3-2).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TLV320DAC23RHDG4 | SERIAL INPUT LOADING, 32-BIT DAC, PQCC28 |
| TLV320DAC23GQER | SERIAL INPUT LOADING, 32-BIT DAC, PBGA80 |
| TLV320DAC23IPWG4 | SERIAL INPUT LOADING, 32-BIT DAC, PDSO28 |
| TLV320DAC23IPWRG4 | SERIAL INPUT LOADING, 32-BIT DAC, PDSO28 |
| TLV320DAC23IRHDRG4 | SERIAL INPUT LOADING, 32-BIT DAC, PQCC28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLV320DAC23RHDRG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Octal Buffer/Driver With 3-State Outputs RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC26 | 制造商:BB 制造商全稱:BB 功能描述:LOW POWER STEREO AUDIO DAC WITH HEADPHONE/SPEAKER AMPLIFIER |
| TLV320DAC26EVM | 功能描述:音頻 IC 開發(fā)工具 TLV320DAC26 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| TLV320DAC26IRHB | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Lo-Pwr Ster DAC w/Hdphn/Spkr Amp RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC26IRHBG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 18-Bit Univ Bus Drv With 3-State Outputs RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。