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參數資料
| 型號： | TLV5535IPW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | GREEN, PLASTIC, TSSOP-28 |
| 文件頁數： | 7/35頁 |
| 文件大小： | 723K |
| 代理商： | TLV5535IPW |
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TLV5535
8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER
SLAS221 – JUNE 1999
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLE OF OPERATION
ac coupled input (continued)
VIN
AIN
TLV5535
R1
R2
VBIAS
+
–
C1
C2
Figure 14. AC-Coupled Input Circuit
reference terminals
The voltages on terminals REFBI and REFTI determine the TLV5535 input range. Since the device has an
internal voltage reference generator with outputs available on REFBO and REFTO respectively, corresponding
terminals can be directly connected externally to provide a contained ADC solution. Especially at higher
sampling rates, it is advantageous to have a wider analog input range. The wider analog input range is
achievable by using external voltage references (e.g., at AVDD = 3.3 V, the full-scale range can be extended
from 1 Vpp (internal reference) to 1.3 Vpp (external reference) as shown in Table 1). These voltages should not
be derived via a voltage divider from a power supply source. Instead, a bandgap-derived voltage reference
should be used to derive both references via an op amp circuit. Refer to the schematic of the TLV5535 evaluation
module for an example circuit.
When using external references, the full-scale ADC input range and its dc position can be adjusted. The
full-scale ADC range is always equal to VREFT – VREFB. The maximum full-scale range is dependent on AVDD
as shown in the specification section. In addition to the limitation on their difference, VREFT and VREFB each also
have limits on their useful range. These limits are also dependent on AVDD.
Table 1 summarizes these limits for 3 cases.
Table 1. Recommended Operating Modes
AVDD
VREFB(min)
VREFB(max)
VREFT(min)
VREFT(max)
(VREFT–VREFB)max
3 V
0.8 V
1.2 V
1.8 V
2.2 V
1 V
3.3 V
0.8 V
1.2 V
2.1 V
2.5 V
1.3 V
3.6 V
0.8 V
1.2 V
2.4 V
2.8 V
1.6 V
digital inputs
The digital inputs are CLK, STDBY, PWDN_REF, and OE. All of these signals, except CLK, have an internal
pulldown resistor to connect to digital ground. This provides a default active operation mode using internal
references when left unconnected.
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相關代理商/技術參數 |
參數描述 |
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| TLV5535IPWG4 | 功能描述:模數轉換器 - ADC 8 Bit 35 MSPS Single Ch. Low Pwr RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV5535IPWR | 功能描述:模數轉換器 - ADC 8 Bit 35 MSPS Single Ch. Low Pwr RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV5535IPWRG4 | 功能描述:模數轉換器 - ADC 8 Bit 35 MSPS Single Ch. Low Pwr RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV5535IPWRG4Q1 | 功能描述:模數轉換器 - ADC 8 Bit 35MSPS ADC Sgl Ch Low Pwr RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV5535IPWRQ1 | 功能描述:模數轉換器 - ADC Auto Cat 8B 35MSPS ADC Sgl Ch. Lo Pwr RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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