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參數資料
型號: TLV5620IDRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 10 us SETTLING TIME, 8-BIT DAC, PDSO14
封裝: GREEN, PLASTIC, SOIC-14
文件頁數: 12/14頁
文件大?。?/td> 180K
代理商: TLV5620IDRG4
TLV5620C, TLV5620I
QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS110B – JANUARY 1995 – REVISED APRIL 1997
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
equivalent inputs and outputs
GND
Vref
Input
VDD
To DAC
Resistor
String
_
+
VDD
DAC
Voltage Output
ISINK
60
A
Typical
84 k
84 k
× 1
× 2
Output
Range
Select
Input from
Decoded DAC
Register String
INPUT CIRCUIT
OUTPUT CIRCUIT
GND
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (VDD – GND)
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage range
GND – 0.3 V to VDD + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference input voltage range, VID
GND – 0.3 V to VDD + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: TLV5620C
0
°C to 70°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLV5620I
– 40
°C to 85°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–50
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage, VDD
2.7
3.3
5.25
V
High-level input voltage, VIH
0.8 VDD
V
Low-level input voltage, VIL
0.8
V
Reference voltage, Vref [A|B|C|D], x1 gain
VDD – 1.5
V
Load resistance, RL
10
k
Setup time, data input, tsu(DATA-CLK) (see Figures 1 and 2)
50
ns
Valid time, data input valid after CLK
↓, tv(DATA-CLK) (see Figures 1 and 2)
50
ns
Setup time, CLK eleventh falling edge to LOAD, tsu(CLK-LOAD) (see Figure 1)
50
ns
Setup time, LOAD
↑ to CLK↓, tsu(LOAD-CLK) (see Figure 1)
50
ns
Pulse duration, LOAD, tw(LOAD) (see Figure 1)
250
ns
Pulse duration, LDAC, tw(LDAC) (see Figure 2)
250
ns
Setup time, LOAD
↑ to LDAC↓,tsu(LOAD-LDAC) (see Figure 2)
0
ns
CLK frequency
1
MHz
Operating free air temperature TA
TLV5620C
0
70
°C
Operating free-air temperature, TA
TLV5620I
–40
85
°C
相關PDF資料
PDF描述
TLV5620IDR SERIAL INPUT LOADING, 10 us SETTLING TIME, 8-BIT DAC, PDSO14
TLV5620ID SERIAL INPUT LOADING, 10 us SETTLING TIME, 8-BIT DAC, PDSO14
TLV5620CDR SERIAL INPUT LOADING, 10 us SETTLING TIME, 8-BIT DAC, PDSO14
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