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參數資料
| 型號： | TLV5626IDRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 8-BIT DAC, PDSO8 |
| 封裝： | PLASTIC, SOIC-8 |
| 文件頁數： | 4/19頁 |
| 文件大小： | 424K |
| 代理商： | TLV5626IDRG4 |
TLV5626
2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG
CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
SLAS236A –JUNE 1999 – REVISED JUNE 2000
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
data bits: CONTROL
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X
REF1
REF0
X: don’t care
REF1 and REF0 determine the reference source and, if internal reference is selected, the reference voltage.
reference bits
REF1
REF0
REFERENCE
0
External
0
1
1.024 V
1
0
2.048 V
1
External
CAUTION:
If external reference voltage is applied to the REF pin, external reference MUST be selected.
examples of operation:
D Set DAC A output, select fast mode, select internal reference at 2.048 V:
1.
Set reference voltage to 2.048 V (CONTROL register):
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
1
0
1
0
2.
Write new DAC A value and update DAC A output:
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
New DAC A output value
0
The DAC A output is updated on the rising clock edge after D0 is sampled.
To output data consecutively using the same DAC configuration, it is not necessary to program the CONTROL
register again.
D Set DAC B output, select fast mode, select external reference:
3.
Select external reference (CONTROL register):
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
1
0
4.
Write new DAC B value to BUFFER and update DAC B output:
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
New BUFFER content and DAC B output value
0
X = Don’t care
The DAC A output is updated on the rising clock edge after D0 is sampled.
To output data consecutively using the same DAC configuration, it is not necessary to program the CONTROL
register again.
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