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參數資料
| 型號： | TLV5633IDWG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
| 封裝： | GREEN, PLASTIC, SOIC-20 |
| 文件頁數： | 3/25頁 |
| 文件大小： | 486K |
| 代理商： | TLV5633IDWG4 |
www.ti.com
APPLICATION INFORMATION
GENERAL FUNCTION
2 REF
CODE
0 1000
[V]
PARALLEL INTERFACE
SLAS190C – MARCH 1999 – REVISED SEPTEMBER 2006
The TLV5633 is a 12-bit, single supply DAC, based on a resistor string architecture. It consists of a parallel
interface, a speed and power down control logic, a programmable internal reference, a resistor string, and a
rail-to-rail output buffer. The output voltage (full scale determined by reference) is given by:
Where REF is the reference voltage and CODE is the digital input value in the range 0x000 to 0xFFF. A power
on reset initially puts the internal latches to a defined state (all bits zero).
The device latches data on the positive edge of WE. It must be enabled with CS low. Whether the data is written
to one of the DAC holding latches (MSW, LSW) or the control register depends on the address bits A1 and A0.
LDAC low updates the DAC with the value in the holding latch. LDAC is an asynchronous input and can be held
low, if a separate update is not necessary. However, to control the DAC using the load feature, there should be
approximately a 5 ns delay after the positive WE edge before driving LDAC low. Two more asynchronous inputs,
SPD and PWR control the settling times and the power-down mode:
SPD:
Speed control
1
→ fast mode
0
→ slow mode
PWR:
Power control
1
→ normal operation
0
→ power down
It is also possible to program the different modes (fast, slow, power down) and the DAC update latch using the
control register. The following tables list the possible combinations of control signals and control bits.
PIN
BIT
MODE
SPD
0
Slow
0
1
Fast
1
0
Fast
1
Fast
PIN
BIT
POWER
PWR
PWD
0
Down
0
1
Down
1
0
Normal
1
Down
PIN
BIT
LATCH
LDAC
RLDAC
0
Transparent
0
1
Transparent
1
0
Hold
1
Transparent
11
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| TLV5633CPWG4 | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
| TLV5633CPWR | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
| TLV5633IDWR | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TLV5633IDWR | 功能描述:數模轉換器- DAC 2.7-5.5-V Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| TLV5633IDWRG4 | 功能描述:數模轉換器- DAC 2.7-5.5-V Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| TLV5633IPW | 功能描述:數模轉換器- DAC 12bit DAC w/V Ref RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| TLV5633IPWG4 | 功能描述:數模轉換器- DAC 2.7-5.5-V Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| TLV5633IPWR | 功能描述:數模轉換器- DAC 2.7-5.5-V Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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