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參數資料
型號: TLV5637IDRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 10-BIT DAC, PDSO8
封裝: GREEN, PLASTIC, MS-012AA, SOIC-8
文件頁數: 6/21頁
文件大?。?/td> 422K
代理商: TLV5637IDRG4
www.ti.com
DEFINITIONS OF SPECIFICATIONS AND TERMINOLOGY
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Zero-Scale Error (EZS)
GAIN ERROR (E
G)
SIGNAL-TO-NOISE RATIO + DISTORTION (S/N+D)
SPURIOUS FREE DYNAMIC RANGE (SFDR)
SLAS224C – JUNE 1999 – REVISED JUNE 2007
The relative accuracy or integral nonlinearity (INL), sometimes referred to as linearity error, is the maximum
deviation of the output from the line between zero and full scale excluding the effects of zero code and full-scale
errors.
The differential nonlinearity (DNL), sometimes referred to as differential error, is the difference between the
measured and ideal 1LSB amplitude change of any two adjacent codes. Monotonic means the output voltage
changes in the same direction (or remains constant) as a change in the digital input code.
Zero-scale error is defined as the deviation of the output from 0V at a digital input value of 0.
Gain error is the error in slope of the DAC transfer function.
S/N+D is the ratio of the rms value of the measured input signal to the rms sum of all other spectral components
below the Nyquist frequency, including harmonics but excluding dc. The value for S/N+D is expressed in
decibels.
Spurious free dynamic range is the difference between the rms value of the output signal and the rms value of
the spurious signal within a specified bandwidth. The value for SFDR is expressed in decibels.
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相關PDF資料
PDF描述
TLV5637ID SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 10-BIT DAC, PDSO8
TLV5637CDG4 SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 10-BIT DAC, PDSO8
TLV5637IDR SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 10-BIT DAC, PDSO8
TLV5637CD SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 10-BIT DAC, PDSO8
TLV5637IDG4 SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 10-BIT DAC, PDSO8
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