欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: TLV5639CDW
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
封裝: GREEN, PLASTIC, SOIC-20
文件頁數: 3/23頁
文件大小: 477K
代理商: TLV5639CDW
www.ti.com
APPLICATION INFORMATION
GENERAL FUNCTION
2 REF
CODE
0x1000
[V]
PARALLEL INTERFACE
Address
Decoder
A(0–15)
IS
WE
D(0–15)
CS
LDAC
WE
D(0–11)
TMS320C2XX, 5X
TLV5639
Address
Decoder
A(0–15)
TCLK0
R/W
D(0–15)
CS
LDAC
WE
D(0–11)
TMS320C3X
TLV5639
IOSTROBE
REG
> = 1
REG
DATA FORMAT
TLV5639C
TLV5639I
SLAS189C – MARCH 1999 – REVISED JANUARY 2004
The TLV5639 is a 12-bit, single supply DAC, based on a resistor string architecture. It consists of a parallel
interface, a speed and power down control logic, a programmable internal reference, a resistor string, and a
rail-to-rail output buffer. The output voltage (full scale determined by reference) is given by:
Where REF is the reference voltage and CODE is the digital input value in the range 0x000 to 0xFFF. A power-
on reset initially puts the internal latches to a defined state (all bits zero).
The device latches data on the positive edge of WE. It must be enabled with CS low. Whether the data is written
to the DAC holding latch or the control register depends on REG. REG = 0 selects the DAC holding latch,REG =
1 selects the control register. LDAC low updates the DAC with the value in the holding latch. LDAC is an
asynchronous input and can be held low, if a separate update is not necessary. However, to control the DAC
using the load feature, there should be approximately a 5 ns delay after the positive WE edge before driving
LDAC low.
Figure 11.
The TLV5639 writes data either to the DAC holding latch or to the control register, depending on the level of the
REG input.
Data destination:
REG = 0
→ DAC holding latch
REG = 1
→ control register
11
相關PDF資料
PDF描述
TLV5639IPWR PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639CPWG4 PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639QDW PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639QDWR PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639QDWREP PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
相關代理商/技術參數
參數描述
TLV5639CDWG4 功能描述:數模轉換器- DAC 12bit DAC w/V Ref RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
TLV5639CDWR 功能描述:數模轉換器- DAC Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
TLV5639CDWRG4 功能描述:數模轉換器- DAC Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
TLV5639CPW 功能描述:數模轉換器- DAC Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
TLV5639CPWG4 功能描述:數模轉換器- DAC Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
主站蜘蛛池模板: 桦南县| 德令哈市| 碌曲县| 剑河县| 金溪县| 八宿县| 阳东县| 通化县| 关岭| 金阳县| 灵武市| 临海市| 广河县| 峨眉山市| 渑池县| 霸州市| 邵武市| 昌江| 驻马店市| 临漳县| 多伦县| 安仁县| 会泽县| 乌拉特中旗| 徐水县| 余江县| 仁寿县| 泾阳县| 黄石市| 怀远县| 桃江县| 宁津县| 阿鲁科尔沁旗| 东乌珠穆沁旗| 宝清县| 河西区| 珠海市| 望奎县| 新晃| 大竹县| 山西省|