欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數(shù)資料
型號(hào): TLV5639IPWR
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
封裝: GREEN, PLASTIC, TSSOP-20
文件頁數(shù): 3/23頁
文件大小: 477K
代理商: TLV5639IPWR
www.ti.com
APPLICATION INFORMATION
GENERAL FUNCTION
2 REF
CODE
0x1000
[V]
PARALLEL INTERFACE
Address
Decoder
A(0–15)
IS
WE
D(0–15)
CS
LDAC
WE
D(0–11)
TMS320C2XX, 5X
TLV5639
Address
Decoder
A(0–15)
TCLK0
R/W
D(0–15)
CS
LDAC
WE
D(0–11)
TMS320C3X
TLV5639
IOSTROBE
REG
> = 1
REG
DATA FORMAT
TLV5639C
TLV5639I
SLAS189C – MARCH 1999 – REVISED JANUARY 2004
The TLV5639 is a 12-bit, single supply DAC, based on a resistor string architecture. It consists of a parallel
interface, a speed and power down control logic, a programmable internal reference, a resistor string, and a
rail-to-rail output buffer. The output voltage (full scale determined by reference) is given by:
Where REF is the reference voltage and CODE is the digital input value in the range 0x000 to 0xFFF. A power-
on reset initially puts the internal latches to a defined state (all bits zero).
The device latches data on the positive edge of WE. It must be enabled with CS low. Whether the data is written
to the DAC holding latch or the control register depends on REG. REG = 0 selects the DAC holding latch,REG =
1 selects the control register. LDAC low updates the DAC with the value in the holding latch. LDAC is an
asynchronous input and can be held low, if a separate update is not necessary. However, to control the DAC
using the load feature, there should be approximately a 5 ns delay after the positive WE edge before driving
LDAC low.
Figure 11.
The TLV5639 writes data either to the DAC holding latch or to the control register, depending on the level of the
REG input.
Data destination:
REG = 0
→ DAC holding latch
REG = 1
→ control register
11
相關(guān)PDF資料
PDF描述
TLV5639CPWG4 PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639QDW PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639QDWR PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639QDWREP PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV571IDWRG4 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV5639IPWRG4 功能描述:數(shù)模轉(zhuǎn)換器- DAC Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
TLV5639QDW 制造商:Texas Instruments 功能描述:DAC 1CH RES-STRING 12-BIT 20SOIC - Rail/Tube
TLV5639QDWR 制造商:Texas Instruments 功能描述:DAC 1CH RES-STRING 12-BIT 20SOIC - Tape and Reel
TLV571 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTER
TLV571_06 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTER
主站蜘蛛池模板: 元谋县| 涪陵区| 建湖县| 辽阳市| 阜阳市| 磐安县| 承德县| 清苑县| 高要市| 额敏县| 左权县| 荃湾区| 武夷山市| 长白| 闵行区| 正蓝旗| 赞皇县| 灵台县| 枣阳市| 博客| 怀集县| 工布江达县| 乌兰察布市| 南江县| 蕲春县| 神木县| 洞头县| 建始县| 宜州市| 民丰县| 黑龙江省| 卫辉市| 开封市| 沈丘县| 定南县| 安阳市| 汽车| 西吉县| 灵川县| 荆门市| 镇宁|