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參數資料
| 型號： | TLV977-10CPFB |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, TQFP-48 |
| 文件頁數： | 21/21頁 |
| 文件大小： | 289K |
| 代理商： | TLV977-10CPFB |
TLV977-10
3-V, 10-BIT, 21 MSPS, AREA CCD SENSOR PROCESSOR
SLAS229 – AUGUST 1999
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
REGISTER DEFINITION
serial input data format
DI15
DI14
DI13
DI12
DI11
DI10
DI9
DI8
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
X
A3
A2
A1
A0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
A3
A2
A1
A0
D9 – D0
0
Control register
10-bit data to be written into the selected register
0
1
PGA gain register
0
1
0
User DAC1 register
0
1
User DAC2 register
0
1
0
Coarse offset DAC
0
1
0
1
Fine offset DAC
0
1
0
Digital Vb register (set reference code level at the ADc output during the optical black interval)
0
1
Optical black register (set the number of black pixels per line and number of the lines for digital averaging)
1
0
Test register
control register format
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
STBY
PDD1
PDD2
ACD
AFD
X
RTOB
RTSY
control register description
BIT
NAME
DESCRIPTION
D9
STBY
Device power down control: 1 = standby, 0 = active (default)
D8
PDD1
Power down the user DAC1: 1 = standby, 0 = active (default)
D7
PDD2
Power down the user DAC2: 1 = standby, 0 = active (default)
D6
ACD
Coarse offset DAC mode control:
0 = Auto calibration (default),
1 = Bypass auto calibration
Note: When D6 is set to 0, D5 must also be set to 0 (automode). Otherwise, the automode will be
disabled on both offset DACs.
D5
AFD
Fine offset DAC mode control:
0 = Auto calibration (default),
1 = Bypass auto calibration.
Note: D5 can be set to 0 with or without the D6 being set to 0.
D4 – D2
X
Reserved
D1
RTOB
Write 1 to this bit will reset calculated black-level results in the digital averager.
D0
RTSY
#Write 1 to this bit will rewet entire system to the default settings.
PGA register format
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X
BIT8
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
Default PGA gain = X000000000 or 0 dB
user DAC1 and DAC2 registers format
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
S
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
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