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參數(shù)資料
| 型號： | TMC2250A |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Matrix Multiplier 12 x 10 bit, 50 MHz |
| 中文描述： | 矩陣乘法12 × 10位，50兆赫 |
| 文件頁數(shù)： | 1/23頁 |
| 文件大?。?/td> | 186K |
| 代理商： | TMC2250A |
www.fairchildsemi.com
REV. 1.0.2 10/25/00
Features
Four user-selectable filtering and transformation
functions:
– Triple dot product (3 x 3) matrix multiply
– Cascadeable 9-tap systolic FIR filter
– Cascadeable 3 x 3-pixel image convolver
– Cascadeable 4 x 2-pixel image convolver
50 MHz (20ns) pipelined throughput
12-bit input and output data, 10-bit coefficients
6-bit cascade input and output ports in all filter modes
Onboard coefficient storage, with three-cycle updating of
all nine coefficients
Applications
Image filtering and manipulation
Video effects generation
Video standards conversion and encoding/decoding
Three-dimensional image manipulation
Medical image processing
Edge detection for object recognition
FIR filtering for communications systems
Description
The TMC2250A is a flexible high-performance nine-multiplier
array VLSI circuit which can execute a cascadeable 9-tap
FIR filter, a cascadeable 4 x 2 or 3 x 3-pixel image convolu-
tion, or a 3 x 3 color space conversion. All configurations
offer throughput at up to the maximum guaranteed 50 MHz
clock rate with 12-bit data and 10-bit coefficients. All inputs
and outputs are registered on the rising edges of the clock.
The 3 x 3 matrix multiply or color conversion configuration
can perform video standard conversion (YIQ or YUV to
RGB, etc.) or three-dimensional perspective translation at
real-time video rates.
The 9-tap FIR filter configuration, useful in Video, Telecom-
munications, and Signal Processing, features a 16-bit cascade
input to allow construction of longer filters.
The cascadeable 3 x 3 and 4 x 2-pixel image convolver func-
tions allow the user to perform numerous image processing
functions, including static filters and edge detectors. The 16-bit
cascade input port facilitates two-chip 50 MHz cubic convo-
lution (4 x 4-pixel kernel).
The TMC2250A is fabricated in a sub-micron CMOS process
and operates at clock speeds of up to 50 MHz over the full
commercial (0°C to 70°C) temperature and supply voltage
ranges. It is available in 120-pin Plastic Pin Grid Array
(PPGA) packages, 120-lead Ceramic Pin Grid Array pack-
age (CPGA), 120-lead PQFP to PPGA package (MPGA) and
120-lead Plastic Quad FlatPack (PQFP). All input and output
signals are TTL compatible.
TMC2250A
Matrix Multiplier
12 x 10 bit, 50 MHz
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| TMC2250AH6C | JT 7C 7#20 PIN PLUG |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMC2250AG1C | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz |
| TMC2250AG1C2 | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz |
| TMC2250AG1C3 | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz |
| TMC2250AH5C | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMC2250AH5C2 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz |
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