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| 型號(hào)： | TMDS361PAG |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, TQFP-64 |
| 文件頁(yè)數(shù)： | 30/43頁(yè) |
| 文件大小： | 2159K |
| 代理商： | TMDS361PAG |
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SLLS919A – DECEMBER 2008 – REVISED JANUARY 2009............................................................................................................................................ www.ti.com
Table 8. I2C Register 0x01 Lookup Table (continued)
BIT
VALUE
STATE
DEFAULT
DESCRIPTION
1:0
Bit 1
Bit 0
Power Mode
1
0
Device enters low-power mode.
1
Device enters low-power mode.
0
1
Reserved
0
X
Device is in normal-power mode.
Register 0x01 is read/write.
Table 9. I2C Register 0x02 Lookup Table
BIT
VALUE
STATE
DEFAULT
DESCRIPTION
7:6
Bit 7
Bit 6
Port Select Status Indicator
1
X
Indicates port 1 is selected as the active port, all other ports are low.
1
0
Indicates port 2 is selected as the active port, all other ports are low.
0
Indicates port 3 is selected as the active port, all other ports are low.
0
1
Indicates standby mode: HPD[1:3] follows HPD_SINK.
5:4
Bit 4
Bit 3
OVS Control Status Indicator
0
Indicates DDC sink side VOL and VIL offset range 2: VIL2 (max): 0.4 V, VOL2 (max): 0.6 V
0
1
X
Indicates DDC sink side VOL and VIL offset range 3: VIL3 (max): 0.3 V, VOL3 (max): 0.5 V
1
Indicates DDC sink side VOL and VIL offset range 1: VIL1 (max): 0.4 V, VOL1 (max): 0.7 V
3:2
Bit 3
Bit 2
Output Edge Rate Status Control
1
Indicates fastest TMDS output rise and fall time setting + 120 ps approximately (slowest rise
and fall time setting)
1
0
Indicates fastest TMDS output rise and fall time setting + 100 ps approximately
0
1
Indicates fastest TMDS output rise and fall time setting + 50 ps approximately
0
X
Indicates fastest TMDS output rise and fall time setting
1:0
Bit 1
Bit 0
Power Mode Status Indicator
1
0
Indicates device enters low-power mode
1
Indicates device enters low-power mode
0
1
Reserved
0
X
Indicates device is in normal-power mode
Register 0x02 is read-only.
Table 10. I2C Register 0x03 Lookup Table
BIT
VALUE
STATE
DEFAULT
DESCRIPTION
7
1
Clock
Clock Detect Circuit Disabled. For HDMI compliance testing (TMDS Termination Voltage Test)
detect
clock-detect feature should be disabled. In this mode the terminations on the TMDS input data
disabled
lines are always connected when the port is selected.
0
Clock
X
Clock Detect Circuit Enabled. It is recommended that TMDS361 is used in this default mode
detect
during normal operation where clock detect circuit is enabled . The terminations on the TMDS
enabled
input data lines are connected only when valid TMDS clock is detected on the selected port.
6:5
X
RSVD
Reserved
4
0
RSVD
X
Note: Do not write a 1 to this bit
3:0
0
RSVD
X
Reserved
Register 0x03 is read/write, For disabling clock detect, value of 80h or 1000 0000b can be written to register
0x03.
36
Copyright 2008–2009, Texas Instruments Incorporated
Product Folder Link(s) :TMDS361
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| TMDS361PAGR | 功能描述:視頻開(kāi)關(guān) IC 3 to 1 HDMI Switch RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)數(shù)量:4 開(kāi)啟電阻（最大值）:12 Ohms 傳播延遲時(shí)間: 開(kāi)啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:WQFN-42 封裝:Reel |
| TMDS361PAGT | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1080p - Deep Color 3-to-1 HDMI/DVI Switch with Adaptive Equalization |
| TMDS37000 | 制造商:Texas Instruments 功能描述:STARTER PACK TMS370 |
| TMDS3700572A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS370 MICROCONTROLLER FAMILY DATA BOOK |
| TMDS3740555-09 | 功能描述:開(kāi)發(fā)軟件 TMS370 Optimizing C Cross Compiler RoHS:否 制造商:Atollic Inc. 產(chǎn)品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
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