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參數資料
| 型號： | TMDS442PNPR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | PLASTIC, TQFP-128 |
| 文件頁數： | 27/45頁 |
| 文件大?。?/td> | 1977K |
| 代理商： | TMDS442PNPR |
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SCL
SDA
SCL_SINK
SDA_SINK
EN
OVS
R
T
SCL_SINK/
SDA_SINK
SCL/SDA
Vcc
0.5V
5V +
10%
Vcc/2
t
PLH
I
2C Enable
5V_PWR
I2CEN
GE
5V_EN
EN
SLLS757A – AUGUST 2006 – REVISED MARCH 2007
or not connected, VOL is typically 0.5 V. When OVS is connected to GND, VOL is typically 0.65 V. When OVS is
connected to VCC, VOL is typically 0.8 V. VOL is always higher than the driver R input threshold, VIL, which is
typically 0.4 V, preventing lockup of the repeater loop. The VOL value can be selected to improve or optimize
noise margins between VOL and the VIL of the repeater itself or the VIL of some external device connected on the
T side.
When the R side is pulled up, above 1.5 V, the T side driver turns off and the T side pin is high impedance.
Figure 33. I2C Drivers in TMDS442
When the T side is pulled below 0.4 V by an external I2C driver, both drivers R and T are turned on. Driver R
pulls the R side to near 0 V, and driver T is on, but is overridden by the external I2C driver. If driver T is already
on, due to a low on the R side, driver R just turns on.
When the T side is released by the external I2C driver, driver T is still on, so the T side is only able to rise to the
VOL of driver T. Driver R turns off, since VOL is above its 0.4-V VIL threshold, releasing the R side. If no external
I2C driver is keeping the R side low, the R side rises, and driver T turns off once the R side rises above 1.5 V,
see Figure 34.
Figure 34. Waveform of Turning Driver T Off
It is important that any external I2C driver on the T side is able to pull the bus below 0.4 V to ensure full
operation. If the T side cannot be pulled below 0.4 V, driver R may not recognize and transmit the low value to
the R side.
The I2C drivers are enabled with an internal EN signal. This EN signal is the AND gate result of the 5V_PWR
signal from the selected input port and the I2CEN signal for the output. This AND gate is turned on based on an
OR gate result of the GE and the 5V_EN settings.
Figure 35. I2C Enable Equivalent Logic
Copyright 2006–2007, Texas Instruments Incorporated
33
Product Folder Link(s): TMDS442
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