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參數資料
| 型號： | TMP320C40KGD |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數字信號處理 |
| 英文描述： | Floating-Point Digital Signal Processor Known Good Die(具高性能CPU和DMA控制器，6個通訊口的DSP) |
| 中文描述： | 浮點數字信號處理器已知良品裸片（具高性能的CPU和DMA的控制器，6個通訊口的數字信號處理器） |
| 文件頁數： | 1/10頁 |
| 文件大小： | 184K |
| 代理商： | TMP320C40KGD |
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TMP320C40KGD, SMJ320C40KGD
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
KNOWN GOOD DIE
SPRS036 – NOVEMBER 1995
1
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Commercial Operating Temperature Range
0
°
C to 70
°
C
Military Operating Temperature Range
–55
°
C to 125
°
C; QML Processing
Highest Performance Floating-Point Digital
Signal Processor (DSP)
– Instruction Cycle Time of 40 ns
275 MOPS
50 MFLOPS
20 MIPS
320 Mbytes/s
Six Communication Ports
Six-Channel Direct Memory Access (DMA)
Coprocessor
Support for IEEE, 1/x, 1/
Source-Code Compatible with
TMP/SMJ320C30
Validated Ada Compiler
Single-Cycle 40-Bit Floating-Point,
32-Bit Integer Multipliers
Twelve 40-Bit Registers, Eight Auxiliary
Registers, 14 Control Registers, and Two
Timers
IEEE 1149.1
(JTAG) Boundary-Scan
Compatible
Two External Data and Address Buses
Supporting Shared Memory Systems and
High-Data Rate, Single-Cycle Transfers:
– High Port-Data Rate of 80 Mbytes/s
– 4G-Word Continuous
Program/Data/Peripheral Address
Space
– Memory-Access Request for Fast,
Intelligent Bus Arbitration
– Separate Address, Data, and
Control-Enable Pins
– Four Sets of Memory-Control Signals
Support Different Speed Memories in
Hardware
Fabricated Using 0.8-
μ
m Enhanced
Performance Implanted CMOS (EPIC
)
Technology by Texas Instruments (TI
)
Separate Internal Program, Data, and DMA
Coprocessor Buses for Support of Massive
Concurrent Input/Output (I/O) of Program
and Data Throughput, Maximizing
Sustained CPU Performance
On-Chip Program Cache and
Dual-Access/Single-Cycle RAM for
Increased Memory-Access Performance
– 128-Word Instruction Cache
– 2K-Words of Single-Cycle Dual Access
Program or Data RAM
– Boot Loader (ROM-Based) Supporting
Program Bootup Via 8-, 16-, or 32-Bit
Memories Over Any One of the
Communication Ports
description
The TMP/SMJ320C40KGD DSP is a 32-bit, floating-point processor manufactured in 0.8-
μ
m, double-level
metal CMOS technology. It is the fourth generation of DSPs from Texas Instruments, and it is the world’s first
DSP designed for parallel processing. The on-chip parallel processing capabilities of the ’C40 make the
immense floating-point performance required by many applications achievable and cost-effective.
The TMP/SMJ320C40 is the first DSP with on-chip communication ports for processor-to-processor
communication using simple communication software with no external hardware. This allows connectivity with
no external glue logic. The communication ports remove input/output bottlenecks, and the independent
smart-DMA coprocessor is able to handle the CPU input/output burden.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1995, Texas Instruments Incorporated
EPIC and TI are trademarks of Texas Instruments Incorporated.
IEEE Standard 1149.1–1990 Standard Test-Access Port and Boundary-Scan Architecture.
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