欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數(shù)資料
型號: TMP320C6202BGNY167
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: FIXED-POINT DIGITAL SIGNAL PROCESSORS
中文描述: 定點數(shù)字信號處理器
文件頁數(shù): 73/83頁
文件大小: 1176K
代理商: TMP320C6202BGNY167
TMS320C6211, TMS320C6211B
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS073K
AUGUST 1998
REVISED MARCH 2004
73
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
MULTICHANNEL BUFFERED SERIAL PORT TIMING (CONTINUED)
timing requirements for McBSP as SPI master or slave: CLKSTP = 11b, CLKXP = 0
(see Figure 40)
NO.
150
167
UNIT
MASTER
MIN
26
4
SLAVE
MIN
2
6P
6 + 12P
MAX
MAX
4
5
t
su(DRV-CKXH)
t
h(CKXH-DRV)
Setup time, DR valid before CLKX high
Hold time, DR valid after CLKX high
ns
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 167 MHz, use P = 6 ns.
For all SPI slave modes, CLKG is programmed as 1/2 of the CPU clock by setting CLKSM = CLKGDV = 1.
switching characteristics over recommended operating conditions for McBSP as SPI master or
slave: CLKSTP = 11b, CLKXP = 0
(see Figure 40)
NO.
PARAMETER
150
167
UNIT
MASTER
§
MIN
L
9
T
9
9
SLAVE
MIN
MAX
L + 9
T + 9
MAX
1
2
3
t
h(CKXL-FXL)
t
d(FXL-CKXH)
t
d(CKXL-DXV)
Hold time, FSX low after CLKX low
Delay time, FSX low to CLKX high
#
Delay time, CLKX low to DX valid
Disable time, DX high impedance following last data bit from
CLKX low
ns
ns
ns
9
6P + 4
10P + 20
6
t
dis(CKXL-DXHZ)
9
9
6P + 3
10P + 20
ns
7
t
d(FXL-DXV)
Delay time, FSX low to DX valid
H
9
H + 9
4P + 2
8P + 20
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 167 MHz, use P = 6 ns.
For all SPI slave modes, CLKG is programmed as 1/2 of the CPU clock by setting CLKSM = CLKGDV = 1.
§
S =
Sample rate generator input clock = 2P if CLKSM = 1 (P = 1/CPU clock frequency)
=
Sample rate generator input clock = P_clks if CLKSM = 0 (P_clks = CLKS period)
T =
CLKX period = (1 + CLKGDV) * S
H =
CLKX high pulse width = (CLKGDV/2 + 1) * S if CLKGDV is even
= (CLKGDV + 1)/2 * S if CLKGDV is odd or zero
L =
CLKX low pulse width
= (CLKGDV/2) * S if CLKGDV is even
= (CLKGDV + 1)/2 * S if CLKGDV is odd or zero
FSRP = FSXP = 1. As a SPI master, FSX is inverted to provide active-low slave-enable output. As a slave, the active-low signal input on FSX
and FSR is inverted before being used internally.
CLKXM = FSXM = 1, CLKRM = FSRM = 0 for master McBSP
CLKXM = CLKRM = FSXM = FSRM = 0 for slave McBSP
#
FSX should be low before the rising edge of clock to enable slave devices and then begin a SPI transfer at the rising edge of the master clock
(CLKX).
Bit 0
Bit(n-1)
(n-2)
(n-3)
(n-4)
Bit 0
Bit(n-1)
(n-2)
(n-3)
(n-4)
4
3
7
6
2
1
CLKX
FSX
DX
DR
5
Figure 40. McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 0
相關(guān)PDF資料
PDF描述
TMX320C6202BGNZ167 FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMX320C6413ZTSA500 Fixed-Point Digital Signal Processors
TMX320C6413ZTS400 Fixed-Point Digital Signal Processors
TMP320C6413ZTS400 Fixed-Point Digital Signal Processors
TMX320C6413ZTS500 Fixed-Point Digital Signal Processors
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMP320C6202BGNZ167 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMP320C6202BPYP167 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMP320C6202GFN100 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR
TMP320C6202GFNA100 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR
TMP320C6202GGP100 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR
主站蜘蛛池模板: 呼玛县| 宜都市| 黄陵县| 烟台市| 通州区| 安岳县| 建水县| 皮山县| 临潭县| 弥渡县| 鹤岗市| 碌曲县| 章丘市| 乡宁县| 贵州省| 鱼台县| 盐城市| 富顺县| 闸北区| 金川县| 陆良县| 苏尼特右旗| 文水县| 福鼎市| 大埔县| 治多县| 深州市| 崇仁县| 罗山县| 富顺县| 东至县| 英山县| 获嘉县| 安化县| 东明县| 泰安市| 泽普县| 安乡县| 台北市| 六枝特区| 民乐县|