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參數資料
型號: TMP401AIDGKTG4
廠商: Texas Instruments
文件頁數: 21/28頁
文件大小: 881K
描述: IC TEMP SENSOR DGTL OUT 8-MSOP
標準包裝: 250
功能: 溫度監控系統(傳感器)
傳感器類型: 內部和外部
感應溫度: -40°C ~ 125°C
精確度: ±3°C 本地(最大),±5°C 遠程(最大)
拓撲: ADC,比較器,寄存器庫
輸出類型: 2 線 SMBus?
輸出警報:
輸出風扇:
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 8-MSOP
包裝: 帶卷 (TR)
TMP401
SBOS371A  AUGUST 2006  REVISED OCTOBER 2007
www.ti.com
21
LAYOUT CONSIDERATIONS
Remote temperature sensing on the TMP401 measures
very small voltages using very small currents; therefore,
noise at the IC inputs must be minimized. Most
applications using the TMP401 will have high digital
content, with several clocks and logic level transitions
creating a noisy environment. Layout should adhere to the
following guidelines:
1.  Place the TMP401 as close to the remote junction
sensor as possible.
2.  Route the D+ and D traces next to each other and
shield them from adjacent signals through the use
of ground guard traces, as shown in Figure 18. If a
multilayer PCB is used, bury these traces between
ground or V
DD
 planes to shield them from extrinsic
noise sources. 5 mil PCB traces are recommended.
3.  Minimize additional thermocouple junctions caused
by copper-to-solder connections. If these junctions
are used, make the same number and approximate
locations of copper-to-solder connections in both
the D+ and D connections to cancel any
thermocouple effects.
4.  Use a 0.1礔 local bypass capacitor directly
between the V+ and GND of the TMP401, as shown
in Figure 19. Minimize filter capacitance between
D+ and D to 1000pF or less for optimum
measurement   performance.   This   capacitance
includes any cable capacitance between the
remote temperature sensor and TMP401.
5.  If the connection between the remote temperature
sensor and the TMP401 is between 8 inches and 12
feet, use a twisted-wire pair connection. Beyond
this distance (up to 100ft), use a twisted, shielded
pair with the shield grounded as close to the
TMP401 as possible. Leave the remote sensor
connection end of the shield wire open to avoid
ground loops and 60Hz pickup.
GND
(1)
D+
(1)
D
(1)
GND
(1)
NOTE: (1) 5 mil traces with 5 mil spacing.
Ground or V+ layer
on bottom and/or
top, if possible.
Figure 18. Example Signal Traces
1
2
3
4
8
7
6
5
TMP401
0.1礔 Capacitor
PCB Via
PCB Via
V+
GND
Figure 19. Suggested Bypass Capacitor
Placement
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