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參數(shù)資料
型號: TMPR3927F
廠商: Toshiba Corporation
英文描述: 32 Bit TX39 Family System RISC Microprocessor(32位TX39系列精簡指令集系統(tǒng)計算機(jī)微處理器)
中文描述: 32位TX39家庭系統(tǒng)RISC微處理器(32位TX39系列精簡指令集系統(tǒng)計算機(jī)微處理器)
文件頁數(shù): 1/22頁
文件大?。?/td> 272K
代理商: TMPR3927F
TAEC_rev4_11-Jan-2000 1/22
TMPR3927F
TENTATIVE
TMPR3927F
(32-bit RISC MICROPROCESSOR)
1. GENERAL DESCRIPTION
The TMPR3927F (to be called “TX3927” hereinafter) is a standard micro controller of the 32-bit
RISC Microprocessor TX39 family. The TX3927 uses the TX39/H2 processor core as the CPU.
The TX39/H2 processor core is a RISC CPU core Toshiba developed based on the R3000A
architecture of MIPS Technologies, Inc. The TX3927 has built-in peripheral circuits which include
memory controllers, a PCI controller, DMA controller, serial and parallel ports, and timer/counters.
2. FEATURES
q
TX39/H2 Processor Core
The TX39/H2 is a high-performance 32-bit microprocessor core developed by Toshiba based
on the R3000A
architecture.
8kbytes of Instruction cache (2-way set associative)
4kbytes of Data cache (2-way set associative)
Cache support of burst refill and cache locking functions.
Supports Critical Word First Mode
Incorporates MMU with translation lookaside buffer (TLB)
Single cycle, 32 x 32 bit MAC unit for DSP functions
Built-in Debug Support Unit (DSU)
q
SDRAM Controller
Supports 8 channels of SDRAM, Flash (DIMM), SGRAM, or SMROM memory
Supports 16M/64M/128M/256M bit SDRAM with 2/4 bank size availability
Support of 16/32-bit static bus sizing on a per channel basis
Supports Single Data Rate (SDR) SDRAM
Supports JEDEC standard 100-pin or 168-pin DIMM sockets for SDRAM
Supports JEDEC standard 100-pin DIMM sockets for Flash
q
ROM Controller
Supports 8 channels of ROM, Page Mode ROM, Mask ROM, EPROM, E
2
PROM, SRAM, and
Flash Memory and I/O devices.
Supports memory sizes of 1M Byte to 1GByte per channel in 32-bit mode, and sizes of 1M Byte
to 512M Byte per channel in 16-bit mode
TOSHIBA RISC PROCESSOR
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