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參數資料
型號: TMS4164-20NL
英文描述: x1 Page Mode DRAM
中文描述: x1頁面模式的DRAM
文件頁數: 1/25頁
文件大小: 437K
代理商: TMS4164-20NL
TMS416100, TMS416100P
16777216-BIT
DYNAMIC RANDOM-ACCESS MEMORIES
SMKS611 – FEBRUARY 1994
Copyright
1994, Texas Instruments Incorporated
1
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
This
TMS416100/Ps symbolized with Revision “B”
and subsequent revisions as described on
page 24.
Organization . . . 16 777 216
×
1
Single 5-V Power Supply (
±
10% Tolerance)
Performance Ranges:
ACCESS ACCESS ACCESS
TIME
tRAC
(MAX)
’416100-60
60 ns
’416100-70
70 ns
’416100-80
80 ns
Enhanced Page Mode Operation for Faster
Memory Access
CAS-Before-RAS Refresh
Long Refresh Period
– 4096 Cycle Refresh in 64 ms
(TMS416100)
– 256 ms for Extended Refresh Version
(TMS416100P)
3-State Unlatched Output
Low Power Dissipation (TMS416100P Only)
– 500-
μ
A CMOS Standby Current
– 500-
μ
A Self-Refresh Current
– 500-
μ
A Extended Refresh Battery Backup
Current
All Inputs, Outputs and Clocks Are TTL
Compatible
Operating Free-Air Temperature Range:
0
°
C to 70
°
C
data
sheet
is
applicable
to
all
READ
OR WRITE
CYCLE
(MIN)
110 ns
130 ns
150 ns
TIME
tCAC
(MAX)
15 ns
18 ns
20 ns
TIME
tAA
(MAX)
30 ns
35 ns
40 ns
description
The TMS416100/P series are high-speed, 16777216-bit dynamic random-access memories, organized as
16777216 words of one bit each. The TMS416100P series feature self refresh and extended refresh. They
employ state-of-the-art EPIC
(Enhanced Performance Implanted CMOS) technology for high performance,
reliability, and low power at a low cost.
These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. All inputs, outputs, and clocks
are compatible with Series 74 TTL. All addresses and data-in lines are latched on chip to simplify system design.
Data out is unlatched to allow greater system flexibility.
The TMS416100/P are offered in 300-mil 24/26-lead plastic surface-mount SOJ packages (DJ suffix) and
24/26-lead plastic small-outline packages (DGA suffix). All packages are characterized for operation from 0
°
C
to 70
°
C.
PIN NOMENCLATURE
Address Inputs
Column-Address Strobe
Data In
Data Out
No Internal Connection
Row-Address Strobe
5-V Supply
Ground
Write Enable
A0–A11
CAS
D
Q
NC
RAS
VCC
VSS
W
1
2
3
4
5
6
V
CC
D
NC
W
RAS
A11
8
9
10
11
12
13
A10
A0
A1
A2
A3
V
CC
19
18
17
16
15
14
A8
A7
A6
A5
A4
V
SS
V
SS
Q
NC
CAS
NC
A9
26
25
24
23
22
21
DJ PACKAGE
(TOP VIEW)
V
CC
D
NC
W
RAS
A11
26
25
24
23
22
21
19
18
17
16
15
14
1
2
3
4
5
6
V
SS
Q
NC
CAS
NC
A9
8
9
10
11
12
13
A10
A0
A1
A2
A3
V
CC
A8
A7
A6
A5
A4
V
SS
DGA PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC is a trademark of Texas Instruments Incorporated.
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相關PDF資料
PDF描述
TMS416100-60DJ x1 Fast Page Mode DRAM
TMS416100-60DZ x1 Fast Page Mode DRAM
TMS416100-70DGA x1 Fast Page Mode DRAM
TMS416100-70DJ x1 Fast Page Mode DRAM
TMS416100-70DZ x1 Fast Page Mode DRAM
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