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參數資料
| 型號： | TMS46100P |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 4194304-WORD BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORIES |
| 中文描述： | 4194304字1位動態隨機存取記憶體 |
| 文件頁數： | 1/25頁 |
| 文件大?。?/td> | 383K |
| 代理商： | TMS46100P |
TMS44100, TMS44100P, TMS46100, TMS46100P
4194304-WORD BY 1-BIT
DYNAMIC RANDOM-ACCESS MEMORIES
SMHS561A – MARCH 1995 – REVISED JUNE 1995
1
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Organization . . . 4194304
×
1
Single 5 V Power Supply, for TMS44100/P
(
±
10% Tolerance)
Single 3.3 V Power Supply, for TMS46100/P
(
±
10% Tolerance)
Low Power Dissipation (TMS46100P only)
– 200-
μ
A CMOS Standby
– 200-
μ
A Self Refresh
– 300-
μ
A Extended-Refresh Battery
Backup
Performance Ranges:
ACCESS ACCESS ACCESS
TIME
TIME
(tRAC)
(tCAC)
(MAX)
(MAX)
’4x100/P-60
60 ns
15 ns
’4x100/P-70
70 ns
18 ns
’4x100/P-80
80 ns
20 ns
Enhanced Page-Mode Operation for Faster
Memory Access
CAS-Before-RAS (CBR) Refresh
Long Refresh Period
– 1024-Cycle Refresh in 16 ms
– 128 ms (Max) for Low-Power,
Self-Refresh Version (TMS4x100P)
3-State Unlatched Output
Texas Instruments EPIC
CMOS Process
Operating Free-Air Temperature Range
0
°
C to 70
°
C
description
READ
OR WRITE
CYCLE
(MIN)
110 ns
130 ns
150 ns
TIME
(tAA)
(MAX)
30 ns
35 ns
40 ns
DEVICE
POWER
SUPPLY
SELF-REFRESH
BATTERY
BACKUP
REFRESH
CYCLES
TMS44100
5 V
—
1024 in 16 ms
TMS44100P
5 V
YES
1024 in 128 ms
TMS46100
3.3 V
—
1024 in 16 ms
TMS46100P
3.3 V
YES
1024 in 128 ms
These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. All addresses and data-in lines
are latched on chip to simplify system design. Data out is unlatched to allow greater system flexibility.
The TMS4x100 and TMS4x100P are offered in a 20-/26-lead plastic surface-mount small-outline (TSOP)
package (DGA suffix) and a 300-mil 20-/26-lead plastic surface-mount SOJ package (DJ suffix). Both packages
are characterized for operation from 0
°
C to 70
°
C.
ADVANCE INFORMATION concerns new products in the sampling or
preproduction phase of development. Characteristic data and other
specifications are subject to change without notice.
PIN NOMENCLATURE
A0–A10
CAS
D
NC
Q
RAS
W
VCC
VSS
Address Inputs
Column-Address Strobe
Data In
No Connection
Data Out
Row-Address Strobe
Write Enable
5-V or 3.3-V Supply
Ground
DJ PACKAGE
(TOP VIEW)
V
SS
Q
CAS
NC
A9
A8
A7
A6
A5
A4
26
25
24
23
22
18
17
16
15
14
1
2
3
4
5
9
10
11
12
13
DGA PACKAGE
(TOP VIEW)
D
W
RAS
NC
A10
A0
A1
A2
A3
V
CC
V
SS
Q
CAS
NC
A9
A8
A7
A6
A5
A4
26
25
24
23
22
18
17
16
15
14
1
2
3
4
5
9
10
11
12
13
D
W
RAS
NC
A10
A0
A1
A2
A3
V
CC
EPIC is a trademark of Texas Instruments Incorporated.
A
The
4194304-bit dynamic random-access memories,
organized as 4194304 words of one bit each. The
TMS4x100P series are high-speed, low-power,
self-refresh with extended-refresh, 4194304-bit
dynamic random-access memories, organized as
4194304 words of one bit each. Both series
employ state-of-the-art EPIC
Performance Implanted CMOS) technology for
high performance, reliability, and low voltage.
TMS4x100
series
are
high-speed,
(Enhanced
Copyright
1995, Texas Instruments Incorporated
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