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| 型號： | TMX320C6201PYP167 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Self Laminating Cable ID Markers; External Width:1"; Label Material:Vinyl; Approval Bodies:UL; Color:Black on White; Features:Self-Laminating; Resistant to water, oil, solvents and abrasion |
| 中文描述： | 定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 16/83頁 |
| 文件大小： | 1176K |
| 代理商： | TMX320C6201PYP167 |
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TMS320C6211, TMS320C6211B
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS073K
AUGUST 1998
REVISED MARCH 2004
16
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
EDMA channel synchronization events
The C62x EDMA supports up to 16 EDMA channels. Four of the sixteen channels (channels 8
11) are reserved
for EDMA chaining, leaving 12 EDMA channels available to service peripheral devices. Table 15 lists the source
of synchronization events associated with each of the programmable EDMA channels. For the C6211/11B, the
association of an event to a channel is fixed; each of the EDMA channels has one specific event associated
with it. For more detailed information on the EDMA module, associated channels, and event-transfer chaining,
see the
TMS320C6000 DSP Enhanced Direct Memory Access (EDMA) Controller Reference Guide
(literature
number SPRU234).
Table 15. TMS320C6211/C6211B EDMA Channel Synchronization Events
EDMA
CHANNEL
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
EDMA channels 8 through 11 are used for transfer chaining only. For more detailed information on event-transfer chaining, see the
TMS320C6000 DSP Enhanced Direct Memory Access (EDMA) Controller Reference Guide
(literature number SPRU234).
EVENT NAME
EVENT DESCRIPTION
DSP_INT
TINT0
TINT1
SD_INT
EXT_INT4
EXT_INT5
EXT_INT6
EXT_INT7
EDMA_TCC8
EDMA_TCC9
EDMA_TCC10
EDMA_TCC11
XEVT0
REVT0
XEVT1
REVT1
Host-port interface (HPI)-to-DSP interrupt
Timer 0 interrupt
Timer 1 interrupt
EMIF SDRAM timer interrupt
External interrupt pin 4
External interrupt pin 5
External interrupt pin 6
External interrupt pin 7
EDMA transfer complete code (TCC) 1000b interrupt
EDMA TCC 1001b interrupt
EDMA TCC 1010b interrupt
EDMA TCC 1011b interrupt
McBSP0 transmit event
McBSP0 receive event
McBSP1 transmit event
McBSP1 receive event
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