欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: TMX320C6211BPYP167
廠商: Texas Instruments, Inc.
元件分類: 數字信號處理
英文描述: FIXED-POINT DIGITAL SIGNAL PROCESSORS
中文描述: 定點數字信號處理器
文件頁數: 74/83頁
文件大小: 1176K
代理商: TMX320C6211BPYP167
TMS320C6211, TMS320C6211B
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS073K
AUGUST 1998
REVISED MARCH 2004
74
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
MULTICHANNEL BUFFERED SERIAL PORT TIMING (CONTINUED)
timing requirements for McBSP as SPI master or slave: CLKSTP = 10b, CLKXP = 1
(see Figure 41)
NO.
150
167
UNIT
MASTER
MIN
26
4
SLAVE
MIN
2
6P
6 + 12P
MAX
MAX
4
5
t
su(DRV-CKXH)
t
h(CKXH-DRV)
Setup time, DR valid before CLKX high
Hold time, DR valid after CLKX high
ns
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 167 MHz, use P = 6 ns.
For all SPI slave modes, CLKG is programmed as 1/2 of the CPU clock by setting CLKSM = CLKGDV = 1.
switching characteristics over recommended operating conditions for McBSP as SPI master or
slave: CLKSTP = 10b, CLKXP = 1
(see Figure 41)
NO.
PARAMETER
150
167
UNIT
MASTER
§
MIN
T
9
H
9
9
SLAVE
MIN
MAX
T + 9
H + 9
MAX
1
2
3
t
h(CKXH-FXL)
t
d(FXL-CKXL)
t
d(CKXL-DXV)
Hold time, FSX low after CLKX high
Delay time, FSX low to CLKX low
#
Delay time, CLKX low to DX valid
Disable time, DX high impedance following last data bit from
CLKX high
ns
ns
ns
9
6P + 4
10P + 20
6
t
dis(CKXH-DXHZ)
H
9
H + 9
ns
7
t
dis(FXH-DXHZ)
Disable time, DX high impedance following last data bit from
FSX high
2P + 3
6P + 20
ns
8
t
d(FXL-DXV)
Delay time, FSX low to DX valid
4P + 2
8P + 20
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 167 MHz, use P = 6 ns.
For all SPI slave modes, CLKG is programmed as 1/2 of the CPU clock by setting CLKSM = CLKGDV = 1.
§
S =
Sample rate generator input clock = 2P if CLKSM = 1 (P = 1/CPU clock frequency)
=
Sample rate generator input clock = P_clks if CLKSM = 0 (P_clks = CLKS period)
T =
CLKX period = (1 + CLKGDV) * S
H =
CLKX high pulse width = (CLKGDV/2 + 1) * S if CLKGDV is even
= (CLKGDV + 1)/2 * S if CLKGDV is odd or zero
L =
CLKX low pulse width
= (CLKGDV/2) * S if CLKGDV is even
= (CLKGDV + 1)/2 * S if CLKGDV is odd or zero
FSRP = FSXP = 1. As a SPI master, FSX is inverted to provide active-low slave-enable output. As a slave, the active-low signal input on FSX
and FSR is inverted before being used internally.
CLKXM = FSXM = 1, CLKRM = FSRM = 0 for master McBSP
CLKXM = CLKRM = FSXM = FSRM = 0 for slave McBSP
#
FSX should be low before the rising edge of clock to enable slave devices and then begin a SPI transfer at the rising edge of the master clock
(CLKX).
相關PDF資料
PDF描述
TMP320C6202BPYP167 FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMX320C6202BGHK167 FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMX320C6203BGHK167 FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMX320C6211BGHK167 MS3472W18-32P
TMP320C6202BGHK167 FIXED-POINT DIGITAL SIGNAL PROCESSORS
相關代理商/技術參數
參數描述
TMX320C6211GDP167 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMX320C6211GFN 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PORCESSORS
TMX320C6211GFN167 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS
TMX320C6211GFN21 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PORCESSORS
TMX320C6211GGP100 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR
主站蜘蛛池模板: 铁力市| 遂昌县| 九龙坡区| 邵阳市| 崇左市| 仪陇县| 那坡县| 洞口县| 和龙市| 章丘市| 建昌县| 台东县| 广饶县| 天津市| 桂东县| 平罗县| 吴江市| 子洲县| 太谷县| 南陵县| 富顺县| 铜川市| 辽源市| 兴安县| 西吉县| 德令哈市| 泾川县| 丽水市| 原阳县| 安西县| 城口县| 蒙山县| 丰县| 澎湖县| 江陵县| 庄河市| 和政县| 柘荣县| 林周县| 永济市| 昌邑市|