- 您現在的位置：買賣IC網 > PDF目錄382649 > TMX320F2810GHHS (Texas Instruments, Inc.) DIGITAL SIGNAL PROCESSORS PDF資料下載
參數資料
| 型號： | TMX320F2810GHHS |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數字信號處理 |
| 英文描述： | DIGITAL SIGNAL PROCESSORS |
| 中文描述： | 數字信號處理器 |
| 文件頁數： | 46/103頁 |
| 文件大小： | 1341K |
| 代理商： | TMX320F2810GHHS |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁當前第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁
TMS320F2810, TMS320F2812
DIGITAL SIGNAL PROCESSORS
SPRS174B
–
APRIL 2001
–
REVISED SEPTEMBER 2001
46
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
system control (continued)
The PCLKCR1 and PCLKCR2 registers basically enable/disable clocks to the various peripheral modules in
the F2810 and F2812 devices. Table 32 lists the bit descriptions of the PCLKCR1 and PCLKCR2 registers.
Table 32. PCLKCR Register Bit Definitions
BIT(S)
NAME
TYPE
RESET
DESCRIPTION
0
EVAENCLK
R/W
0
If this bit is set, it enables the high-speed clock (HSPCLK) within the EV-A
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
1
EVBENCLK
R/W
0
If this bit is set, it enables the high-speed clock (HSPCLK) within the EV-B
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
2
reserved
R=0
0
reserved
3
ADCENCLK
R/W
0
If this bit is set, it enables the high-speed clock (HSPCLK) within the ADC
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
7:4
reserved
R=0
0:0
8
SPIAENCLK
R/W
0
If this bit is set, it enables the low-speed clock (LSPCLK) within the SPI
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
9
reserved
R=0
0
reserved
10
SCIAENCLK
R/W
0
If this bit is set, it enables the low-speed clock (LSPCLK) within the SCI-A
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
11
SCIBENCLK
R/W
0
If this bit is set, it enables the low-speed clock (LSPCLK) within the SCI-B
peripheral. For low power operation, this bit is set to zero by the user or
by reset.
12
MAENCLK
R/W
0
If this bit is set, it enables the low-speed clock (LSPCLK) within the
McBSP peripheral. For low power operation, this bit is set to zero by the
user or by reset.
13
reserved
R=0
0
reserved
14
HECCAENCLK
R/W
0
If this bit is set, it enables the system clock within the CAN peripheral. For
low power operation, this bit is set to zero by the user or by reset.
15
reserved
R=0
0
reserved
If a peripheral block is not used, then the clock to that peripheral can be turned off to minimize power consumption.
P
相關PDF資料 |
PDF描述 |
|---|---|
| TMP320F2810GHHS | DIGITAL SIGNAL PROCESSORS |
| TMX320F2810PGFA | DIGITAL SIGNAL PROCESSORS |
| TMP320F2810PGFA | DIGITAL SIGNAL PROCESSORS |
| TMX320F2810PGFAEP | Digital Signal Processors |
| TMP320F2810PGFAEP | Digital Signal Processors |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TMX320F2810PBKA | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMX320F2810PBKAEP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Processors |
| TMX320F2810PBKS | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMX320F2810PGFA | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMX320F2810PGFAEP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Processors |
發布緊急采購，3分鐘左右您將得到回復。