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參數資料
型號: TPA0312PWPR
元件分類: 音頻放大器
英文描述: SWITCH, DPDT, R/A, PCB, ON-OFF-ON; Switch function type:On-Off-On; Material, contact:Copper Alloy; Temp, op. max:85(degree C); Temp, op. min:-30(degree C); Length / Height, external:9.14mm; Width, external:8.13mm; Depth, RoHS Compliant: Yes
中文描述: 音頻放大器|雙|的CMOS | TSSOP封裝| 24針|塑料
文件頁數: 3/31頁
文件大小: 445K
代理商: TPA0312PWPR
TPA0312
2-W STEREO AUDIO POWER AMPLIFIER
WITH FOUR SELECTABLE GAIN SETTINGS AND MUX CONTROL
SLOS335 –DECEMBER 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGED DEVICE
TSSOP
(PWP)
TA
–40
°
C to 85
°
C
The PWP package is available taped and
reeled. To order a taped and reeled part, add
the suffix R to the part number (e.g.,
TPA0312PWPR).
TPA0312PWP
Terminal Functions
TERMINAL
NAME
I/O
DESCRIPTION
NO.
BYPASS
11
Tap to voltage divider for internal mid-supply bias generator
GAIN0
2
I
Bit 0 of gain control
GAIN1
3
I
Bit 1 of gain control
GND
1, 12,
13, 24
Ground connection for circuitry. Connected to the thermal pad.
LHPIN
6
I
Left channel headphone input, selected when SE/BTL is held high
LIN
10
I
Common left input for fully differential input. AC ground for single-ended inputs.
LLINEIN
5
I
Left channel line input, selected when SE/BTL is held low
LOUT+
4
O
Left channel positive output in BTL mode and positive output in SE mode
LOUT–
9
O
Left channel negative output in BTL mode and high-impedance in SE mode
PC-BEEP
14
I
The input for PC Beep mode. PC-BEEP is enabled when a > 1-V (peak-to-peak) square wave is input to
PC-BEEP or PCB ENABLE is high.
HP/LINE
17
I
HP/LINE is the input MUX control input. When the HP/LINE terminal is held high, the headphone inputs
(LHPIN or RHPIN [6, 20]) are active. When the HP/LINE terminal is held low, the line BTL inputs (LLINEIN
or RLINEIN [5, 23]) are active.
PVDD
RHPIN
7, 18
I
Power supply for output stage
20
I
Right channel headphone input, selected when SE/BTL is held high
RIN
8
I
Common right input for fully differential input. AC ground for single-ended inputs.
RLINEIN
23
I
Right channel line input, selected when SE/BTL is held low
ROUT+
21
O
Right channel positive output in BTL mode and positive output in SE mode
ROUT–
16
O
Right channel negative output in BTL mode and high-impedance in SE mode
SHUTDOWN
22
I
Places entire IC in shutdown mode when held low, except PC-BEEP remains active
SE/BTL
15
I
Hold SE/BTL low for BTL mode and hold high for SE mode.
VDD
19
I
Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve highest performance.
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相關代理商/技術參數
參數描述
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