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ORDERING INFORMATION
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
PACKAGE DISSIPATION RATINGS
SLOS476 – JUNE 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
TA
PACKAGE
PART NUMBER
SYMBOL
–40
°C to 85°C
Wafer chip scale packaging – Lead free (YZF)
TPA2032D1YZF (1)
BPX
–40
°C to 85°C
Wafer chip scale packaging – Lead free (YZF)
TPA2033D1YZF (1)
BPY
–40
°C to 85°C
Wafer chip scale packaging – Lead free (YZF)
TPA2034D1YZF (1)
BPZ
(1)
The YZF package is only available taped and reeled. To order add the suffix R to the end of the part number for a reel of 3000, or add
the suffix T to the end of the part number for a reel of 250 (e.g. TPA2032D1YZFR).
over operating free-air temperature range unless otherwise noted(1)
TPA2032D1, TPA2033D1,
TPA2034D1
In active mode
–0.3 V to 6 V
VDD
Supply voltage
In SHUTDOWN mode
–0.3 V to 7 V
VI
Input voltage
–0.3 V to VDD + 0.3 V
Continuous total power dissipation
See Dissipation Rating Table
TA
Operating free-air temperature
–40
°C to 85°C
TJ
Operating junction temperature
–40
°C to 125°C
Tstg
Storage temperature
–65
°C to 150°C
ESD
Electro-Static Discharge Tolerance - Human Body Model (HBM) for all pins(2)
2KV
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The output pins Vo– and Vo+ are tolerant to 1.5KV HBM ESD
MIN
NOM
MAX
UNIT
VDD
Supply voltage
2.5
5.5
V
VIH
High-level input voltage
SHUTDOWN
1.3
VDD
V
VIL
Low-level input voltage
SHUTDOWN
0
0.35
V
VIC
Common mode input voltage range VDD = 2.5 V, 5.5 V
0.5
VDD–0.8
V
TA
Operating free-air temperature
–40
85
°C
DERATING FACTOR
TA ≤ 25°C
TA = 70°C
TA = 85°C
PACKAGE
(1 /
θ
JA)
POWER RATING
YZF
4.8 mW/
°C(1)
480 mW
264 mW
192 mW
YZF
7.5 mW/
°C(2)
750 mW
412 mW
300 mW
(1)
Derating factor measured with JEDEC Low-K board; 1S0P - One signal layer and zero plane layers.
(2)
Derating factor measured with JEDEC High K board; 1S2P - One signal layer and two plane layers.
Please see JEDEC Standard 51-3 for Low-K board, JEDEC Standard 51-7 for High-K board, and JEDEC Standard 51-12 for using
package thermal information.
Please see JEDEC document page for downloadable copies: http://www.jedec.org/download/default.cfm.
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