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參數資料
型號: TPS2390DGK
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝: GREEN, PLASTIC, MSOP-8
文件頁數: 15/20頁
文件大小: 497K
代理商: TPS2390DGK
TPS2390
TPS2391
SLUS471D JUNE 2002 REVISED JANUARY 2008
4
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
VI(VIN) = 48 V with respect to RTN, VI(EN) = 2.8 V, VI(ISENS) = 0, all outputs unloaded, TA = 40_C to 85_C
(unless otherwise noted)(1)(2)
FAULT output
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IOH
High-level output (leakage) current
VI(EN) = 0 V,
VO(FAULT) = 65 V
10
A
RDS(ON)
Driver ON resistance
VI(ISENS) = 80 mV, VO(FLTTIME) = 5V,
IO(FAULT) = 1 mA
35
60
NOTES 1: All voltages are with respect to the VIN terminal unless otherwise stated.
2: Currents are positive into and negative out of the specified terminal.
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
EN
2
I
Enable input to turn on/off power to the load.
FAULT
1
O
Open-drain, active-low indication of a load fault condition.
FLTTIME
3
I/O
Connection for user-programming of the fault timeout period.
GATE
7
O
Gate drive for external N-channel FET.
IRAMP
4
I/O
Programming input for setting the inrush current slew rate.
ISENS
6
I
Current sense input.
RTN
8
I
Positive supply input for the TPS2390 and TPS2391.
VIN
5
I
Negative supply input and reference pin for the TPS2390 and TPS2391.
DETAILED PIN DESCRIPTIONS
EN: Enable input to turn on/off power to the load. The EN pin is referenced to the VIN potential of the circuit.
When this input is pulled high (above the nominal 1.4-V threshold) the device enables the GATE output, and
begins the ramp of current to the load. When this input is low, the linear current amplifier (LCA) is disabled, and
a large pull-down device is applied to the FET gate, disabling power to the load.
FAULT: Open-drain, active-low indication of a load fault condition. When the device EN is deasserted, or when
enabled and the load current is less than the programmed limit, this output is high impedance. If the device
remains in current regulation mode at the expiration of the fault timer, or if a fast-acting overload condition
causes greater than 100-mV drop across the sense resistor, the fault is latched, the load is turned off, and the
FAULT pin is pulled low (to VIN). The TPS2390 remains latched off for a fault, and can be reset by cycling either
the EN pin or power to the device. The TPS2391 retries the load at approximately a 1% duty cycle.
FLTTIME: Connection for user-programming of the fault timeout period. An external capacitor connected from
FLTTIME to VIN establishes the timeout period to declare a fault condition. This timeout protects against
indefinite current sourcing into a faulted load, and also provides a filter against nuisance trips from momentary
current spikes or surges. The TPS2390 and TPS2391 define a fault condition as voltage at the ISENS pin at
or greater than the 40-mV fault threshold. When a fault condition exists, the timer is active. The devices manage
fault timing by charging the external capacitor to the 4-V fault threshold, then subsequently discharging it to reset
the timer (TPS2390), or discharging it at approximately 1% the charge rate to establish the duty cycle for retrying
the load (TPS2391). Whenever the internal fault latch is set (timer expired), the pass FET is rapidly turned off,
and the FAULT output is asserted.
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