- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382677 > TPS3103E33DVB (Texas Instruments, Inc.) ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS PDF資料下載
參數(shù)資料
| 型號(hào)： | TPS3103E33DVB |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS |
| 中文描述： | 超低電源電流/電源電壓監(jiān)控電路 |
| 文件頁(yè)數(shù)： | 12/22頁(yè) |
| 文件大小： | 361K |
| 代理商： | TPS3103E33DVB |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)當(dāng)前第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)
SLVS363B AUGUST 2001 REVISED SEPTEMBER 2004
www.ti.com
12
TIMING REQUIREMENTS AT R
L
= 1 M
, C
L
= 50 PF, T
A
= 40
°
C TO 85
°
C
PARAMETER
VDD
≥
0.85 V
at VDD
VIH = 1.1
×
VIT, VIL = 0.9
×
VIT, VIT = 0.86 V
at MR
VDD
≥
VIT + 0.2 V, VIL = 0.3
×
VDD,
at SENSE
VDD
≥
VIT,
tw
Pulse width
at PFI
VDD
≥
0.85 V,
at WDI
VDD
≥
VIT,
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tt(out)
Time-out period
at WDI
0.55
1.1
1.65
s
20
VIH = 0.7
×
VDD
0.1
VIH = 1.1
×
VIT(S), VIL = 0.9
×
VIT(S)
VIH = 1.1
×
VIT(S),VIL = 0.9
×
VIT(S)
VIL = 0.3
×
VDD,
20
μ
s
20
VIH = 0.7
×
VDD
0.3
SWITCHING CHARACTERISTICS AT R
L
= 1 M
, C
L
= 50 PF, T
A
= 40
°
C TO 85
°
C
PARAMETER
TEST CONDITIONS
VDD
≥
1.1
×
VIT,
MR = 0.7
×
VDD,
See timing diagram
VIH = 1.1
×
VIT,
VIL = 0.9
×
VIT
VIH = 1.1
×
VIT,
VIL = 0.9
×
VIT
VDD
≥
0.8 V,
VIH = 1.1
×
VIT,
VIL = 0.9
×
VIT
VDD
≥
0.8 V,
VIH = 1.1
×
VIT,
VIL = 0.9
×
VIT
VDD
≥
0.8 V,
VIH = 1.1
×
VIT,
VIL = 0.9
×
VIT
VDD
≥
0.8 V,
VIH = 1.1
×
VIT,
VIL = 0.9
×
VIT
MIN
TYP
MAX
UNIT
td
Delay time
65
130
195
ms
tPHL
Propagation delay time, high-to-low level output
VDD to RESET or
RSTVDD delay
VDD to RESET or
RSTVDD delay
40
μ
s
tPLH
Propagation delay time, low-to-high level output
40
tPHL
Propagation delay time, high-to-low level output
SENSE to RESET or
RSTSENSE delay
40
μ
s
tPLH
Propagation delay time, high-to-low level output
SENSE to RESET or
RSTSENSE delay
40
μ
s
tPHL
Propagation delay time, high-to-low level output
PFI to PFO delay
40
μ
s
tPLH
Propagation delay time, low-to-high level output
PFI to PFO delay
300
μ
s
tPHL
Propagation delay time, low-to-high level output
MR to RESET.
RSTVDD,
RSTSENSE delay
VDD
≥
1.1
×
VIT
VIL = 0.3
×
VDD,
VIH = 0.7
×
VDD
1
5
tPLH
Propagation delay time, low-to-high level output
MR to RESET.
RSTVDD,
RSTSENSE delay
μ
s
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TPS3106E33DVB | ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS |
| TPS3110E33DVB | ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS |
| TPS3103H33DVB | ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS |
| TPS3103E09DVB | ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS |
| TPS3103K33DVBR | ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TPS3103E33DVBR | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS |
| TPS3103-EP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Ultra-Low Supply-Current/Supply-Voltage Supervisory Circuits |
| TPS3103H09DVB | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS |
| TPS3103H09DVBR | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS |
| TPS3103H12DVB | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ULTRALOW SUPPLY CURRENT/SUPPLY VOLTAGE SUPERVISORY CIRCUITS |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。