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參數資料
| 型號： | TPS54310PWPRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩壓器 |
| 英文描述： | 6 A SWITCHING REGULATOR, 762 kHz SWITCHING FREQ-MAX, PDSO20 |
| 封裝： | GREEN, PLASTIC, HTSSOP-20 |
| 文件頁數： | 13/19頁 |
| 文件大小： | 463K |
| 代理商： | TPS54310PWPRG4 |
www.ti.com
PACKAGE DISSIPATION RATINGS
(1) (2)
ELECTRICAL CHARACTERISTICS
SLVS412D – DECEMBER 2001 – REVISED FEBRUARY 2007
THERMAL IMPEDANCE
TA = 25°C
TA = 70°C
TA = 85°C
PACKAGE
JUNCTION-TO-AMBIENT
POWER RATING
20-Pin PWP with solder
26
°C/W
3.85 W(3)
2.12 W
1.54 W
20-Pin PWP without solder
57.5
°C/W
1.73 W
0.96 W
0.69 W
(1)
For more information on the PWP package, refer to TI technical brief, literature number SLMA002.
(2)
Test board conditions:
1.
3 inch
× 3 inch, 2 layers, Thickness: 0.062 inch
2.
1.5 oz copper traces located on the top of the PCB
3.
1.5 oz copper ground plane on the bottom of the PCB
4.
Ten thermal vias (see recommended land pattern in application section of this data sheet)
(3)
Maximum power dissipation may be limited by overcurrent protection.
T
J = –40°C to 125°C, VIN = 3 V to 6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY VOLTAGE, VIN
VIN input voltage range
3
6
V
fs = 350 kHz, SYNC = 0.8 V, RT open
6.2
9.6
Quiescent current
fs = 550 kHz, SYNC ≥ 2.5 V, RT open, phase pin open
8.4
12.8
mA
Shutdown, SS/ENA = 0 V
1
1.4
UNDER VOLTAGE LOCK OUT
Start threshold voltage, UVLO
2.95
3
V
Stop threshold voltage, UVLO
2.70
2.80
Hysteresis voltage, UVLO
0.14
0.16
V
Rising and falling edge deglitch, UVLO(1)
2.5
s
BIAS VOLTAGE
Output voltage, VBIAS
I(VBIAS) = 0
2.70
2.80
2.90
V
VO
Output current, VBIAS(2)
100
A
CUMULATIVE REFERENCE
Vref
Accuracy
0.882
0.891
0.900
V
REGULATION
IL = 1.5 A, fs = 350 kHz, TJ = 85°C
0.07
Line regulation(1)(3)
%/V
IL = 1.5 A, fs = 550 kHz, TJ = 85°C
0.07
IL = 0 A to 3 A, fs = 350 kHz, TJ = 85°C
0.03
Load regulation(1)(3)
%/A
IL = 0 A to 3 A, fs = 550 kHz, TJ = 85°C
0.03
OSCILLATOR
SYNC
≤ 0.8 V, RT open
280
350
420
Internally set free-running frequency range
kHz
SYNC
≥ 2.5 V, RT open
440
550
660
RT = 180 k
(1% resistor to AGND)(1)
252
280
308
Externally set free-running frequency range
RT = 100 k
(1% resistor to AGND)
460
500
540
kHz
RT = 68 k
(1% resistor to AGND)(1)
663
700
762
High-level threshold voltage, SYNC
2.5
V
Low-level threshold voltage, SYNC
0.8
V
Pulse duration, SYNC(1)
50
Frequency range, SYNC(1)
330
700
kHz
Ramp valley(1)
0.75
V
Ramp amplitude (peak-to-peak)(1)
1
V
Minimum controllable on time(1)
200
ns
Maximum duty cycle
90%
(1)
Specified by design
(2)
Static resistive loads only
(3)
Specified by the circuit used in Figure 10.
3
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