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參數資料
| 型號： | TPS54316PWPR |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數： | 9/16頁 |
| 文件大小： | 260K |
| 代理商： | TPS54316PWPR |
TPS54611, TPS54612, TPS54613
TPS54614, TPS54615, TPS54616
SLVS400A
–
AUGUST 2001
–
REVISED JANUARY 2002
9
www.ti.com
detailed description (continued)
dead-time control and MOSFET drivers
Adaptive dead-time control prevents shoot-through current from flowing in both N-channel power MOSFETs
during the switching transitions by actively controlling the turnon times of the MOSFET drivers. The high-side
driver does not turn on until the voltage at the gate of the low-side FET is below 2 V. The high-side and low-side
drivers are designed with 300 mA source and sink capability to quickly drive the power MOSFETs gates. The
low-side driver is supplied from VIN, while the high-side drive is supplied from the BOOT pin. A bootstrap circuit
uses an external BOOT capacitor and internal 2.5-
bootstrap switch connected between the VIN and BOOT
pins. The integrated bootstrap switch improves drive efficiency and reduces external component count.
overcurrent protection
Cycle-by-cycle current limiting is achieved by sensing the current flow through the high-side MOSFET and a
differential amplifier with preset overcurrent threshold. The high-side MOSFET is turned off within 200 ns of
reaching the current limit threshold. A 100 ns leading edge blanking circuit prevents false tripping of current limit.
Current limit detection occurs only when current flows from VIN to PH when sourcing current to the output filter.
Load protection during current sink operation is provided by thermal shutdown.
thermal shutdown
The device uses the thermal shutdown to turn off the power MOSFETs and disable the controller if the junction
temperature exceeds 150
°
C. The device is released from shutdown when the junction temperature decreases
to 10
°
C below the thermal shutdown trip point, and will start up under control of the slow-start circuit.Thermal
shutdown provides protection when an overload condition is sustained for several milliseconds. With a
persistent fault condition, the device will cycle continuously: starting up by control of the slow-start circuit,
heating up due to the fault, and then shutting down upon reaching the thermal shutdown trip point.
power good (PWRGD)
The power good circuit monitors for under voltage conditions on VSENSE. If the voltage on VSENSE falls 10%
below the reference voltage, the open-drain PWRGD output is pulled low. PWRGD is also pulled low if VIN is
less than the UVLO threshold, or SS/ENA is low, or thermal shutdown is asserted. When VIN = UVLO threshold,
SS/ENA = enable threshold, and VSENSE > 90% of V
ref
, the open drain output of the PWRGD pin is high. A
hysteresis voltage equal to 3% of V
ref
and a 35-
μ
s falling edge deglitch circuit prevent tripping of the power good
comparator due to high-frequency noise.
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