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參數資料
| 型號： | TPS65930A2ZCHR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA139 |
| 封裝： | 10 X 10 MM, 0.65 MM PITCH, GREEN, PLASTIC, NFBGA-139 |
| 文件頁數： | 101/115頁 |
| 文件大?。?/td> | 1232K |
| 代理商： | TPS65930A2ZCHR |
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HFCLKIN
CH0
CH1
019-017
SWCS037G
– MAY 2008 – REVISED APRIL 2011
When the external clock signal is present on the HFCLKIN ball, it is possible to use this clock instead of
the internal RC oscillator and then synchronize the system on the same clock. The RC oscillator can then
go to idle mode.
Table 11-2 lists the input clock electrical characteristics of the HFCLKIN input clock.
Table 11-2. HFCLKIN Input Clock Electrical Characteristics
Parameter Description
Configuration Mode Slicer
Min
Typ
Max
Unit
Frequency
19.2, 26, or 38.4
MHz
Start-up time
LP(1)/HP(2) (sine wave)
4
μs
LP/HP (sine wave)
0.3
0.7
1.45
Input dynamic range
VPP
BP(3)/PD(4) (square wave)
0
1.85(5)
LP
175
μA
Current consumption
HP
235
BP/PD
39
nA
Harmonic content of input signal (with 0.7-VPP amplitude):
LP/HP (sine wave)
–25
dBc
second component
VIH
Voltage input high
BP (square wave)
1
V
VIL
Voltage input low
BP (square wave)
0.6
V
(1)
LP = Low-power mode
(2)
HP = High-power mode
(3)
BP = Bypass mode
(4)
PD = Power-down mode
(5)
Bypass input max voltage is the same as the maximum voltage provided for the I/O interface (IO.1P8V).
Table 11-3 lists the input clock timing requirements of the HFCLKIN input clock when the source is a
square wave. Figure 11-4 shows the HFCLKIN squared input clock timings.
Table 11-3. HFCLKIN Square Input Clock Timing Requirements with Slicer in Bypass
Name
Parameter
Description
Min
Typ
Max
Unit
CH0
1/tC(HFCLKIN)
Frequency, HFCLKIN
19.2, 26, or 38.4
MHz
CH1
tW(HFCLKIN)
Pulse duration, HFCLKIN low or high
0.45*tC(HFCLKIN)
0.55*tC(HFCLKIN)
ns
CH3
tR(HFCLKIN)
Rise time, HFCLKIN(1)
5
ns
CH4
tF(HFCLKIN)
Fall time, HFCLKIN(1)
5
ns
(1)
Default drive capability is 40 pF.
Figure 11-4. HFCLKIN Squared Input Clock
11.2.3 32-kHz Input Clock
A 32.768-kHz input clock (often abbreviated to 32-kHz) generates the clocks for the RTC. It has a low-jitter
mode where the current consumption increases for lower jitter. It is possible to use the 32-kHz input clock
with an external crystal or clock source. Depending on the mode chosen, the 32K oscillator is configured
one of two ways:
An external 32.768-kHz crystal through the 32KXIN/32KXOUT balls (see Figure 11-5). This
configuration is available only for master mode (for more information, see Section 12).
An external square/sine wave of 32.768 kHz through 32KXIN with amplitude equal to 1.8 or 1.85 V
slave modes (for more information, see Section 12).
86
Clock Specifications
Copyright
2008–2011, Texas Instruments Incorporated
focus.ti.com: TPS65930/TPS65920
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