- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382681 > TPS73250DCQT (Texas Instruments, Inc.) Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection PDF資料下載
參數(shù)資料
| 型號： | TPS73250DCQT |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| 中文描述： | 無電容，NMOS管，150mA的低壓差穩(wěn)壓器的反向電流保護 |
| 文件頁數(shù)： | 12/18頁 |
| 文件大小： | 427K |
| 代理商： | TPS73250DCQT |
www.ti.com
APPLICATION INFORMATION
INPUT AND OUTPUT CAPACITOR
REQUIREMENTS
Although an input capacitor is not required for stab-
ility, it is good analog design practice to connect a
0.1μF to 1μF low ESR capacitor across the input
supply near the regulator. This counteracts reactive
input sources and improves transient response, noise
rejection, and ripple rejection. A higher-value capaci-
tor may be necessary if large, fast rise-time load
transients are anticipated or the device is located
several inches from the power source.
OUTPUT NOISE
A precision band-gap reference is used to generate
the internal reference voltage, V
REF
. This reference is
the dominant noise source within the TPS732xx and
it
generates
approximately
100kHz) at the reference output (NR). The regulator
control loop gains up the reference noise with the
same gain as the reference voltage, so that the noise
voltage of the regulator is approximately given by:
TPS732xx
GND
EN
NR
IN
OUT
V
IN
V
OUT
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient,
noise, or PSRR.
Optional bypass
capacitor to reduce
output noise.
V
N
32 V
RMS
(R
1
R
2
)
R
2
32 V
RMS
V
OUT
V
REF
(1)
TPS732xx
GND
EN
FB
IN
OUT
V
IN
V
OUT
V
OUT
=
×
1.204
(R
1
+ R
2
)
R
2
R
1
C
FB
R
2
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient,
noise, or PSRR.
Optional capacitor
reduces output noise.
V
N
( V
RMS
)
27
V
RMS
V
V
OUT
(V)
(2)
V
N
( V
RMS
)
8.5
V
RMS
V
V
OUT
(V)
(3)
TPS73201, TPS73215, TPS73216
TPS73218, TPS73225, TPS73230
TPS73233, TPS73250
SBVS037F–AUGUST 2003–REVISED SEPTEMBER 2004
The TPS732xx belongs to a family of new generation
LDO regulators that use an NMOS pass transistor to
achieve ultra-low-dropout performance, reverse cur-
rent blockage, and freedom from output capacitor
constraints. These features, combined with low noise
and an enable input, make the TPS732xx ideal for
portable applications. This regulator family offers a
wide selection of fixed output voltage versions and an
adjustable output version. All versions have thermal
and over-current protection, including foldback cur-
rent limit.
Figure 31 shows the basic circuit connections for the
fixed voltage models. Figure 32 gives the connections
for the adjustable output version (TPS73201).
The TPS732xx does not require an output capacitor
for stability and has maximum phase margin with no
capacitor. It is designed to be stable for all available
types and values of capacitors. In applications where
V
IN
- V
OUT
< 0.5V and multiple low ESR capacitors
are in parallel, ringing may occur when the product of
C
OUT
and total ESR drops below 50n
F. Total ESR
includes all parasitic resistances, including capacitor
ESR and board, socket, and solder joint resistance.
In most applications, the sum of capacitor ESR and
trace resistance will meet this requirement.
Figure 31. Typical Application Circuit for
Fixed-Voltage Versions
32μVRMS
(10Hz
to
Since the value of V
REF
is 1.2V, this relationship
reduces to:
Figure 32. Typical Application Circuit for
Adjustable-Voltage Versions
for the case of no C
NR
.
An internal 27k
resistor in series with the noise
reduction pin (NR) forms a low-pass filter for the
voltage reference when an external noise reduction
capacitor, C
NR
, is connected from NR to ground. For
C
NR
= 10nF, the total noise in the 10Hz to 100kHz
bandwidth is reduced by a factor of ~3.2, giving the
approximate relationship:
R
1
and R
2
can be calculated for any output voltage
using the formula shown in Figure 32. Sample re-
sistor values for common output voltages are shown
in Figure 2. For best accuracy, make the parallel
combination of R
1
and R
2
approximately 19k
.
for C
NR
= 10nF.
12
相關PDF資料 |
PDF描述 |
|---|---|
| TPS73215DBVTG4 | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| TPS73230DCQG4 | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| TPS732XX | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| TPS7348QPW | LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION |
| TPS7330QPW | LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TPS73250MDBVREP | 功能描述:低壓差穩(wěn)壓器 - LDO Mil Enh Cap-Free NMOS 250-mA LDO Reg RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS73250QDCQRQ1 | 功能描述:低壓差穩(wěn)壓器 - LDO AC Cap-Free NMOS 250mA LDO Reg RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS7325QD | 功能描述:低壓差穩(wěn)壓器 - LDO Low-Dropout Voltage Regulator RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS7325QDG4 | 功能描述:低壓差穩(wěn)壓器 - LDO Low-Dropout Voltage Regulator RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS7325QDR | 功能描述:低壓差穩(wěn)壓器 - LDO Low-Dropout Voltage Regulator RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
發(fā)布緊急采購，3分鐘左右您將得到回復。