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參數(shù)資料
| 型號： | TQ8223 |
| 英文描述： | ATM/SONET Demultiplexer |
| 中文描述： | ATM機(jī)/ SONET的多路解復(fù)用器 |
| 文件頁數(shù)： | 4/22頁 |
| 文件大小： | 210K |
| 代理商： | TQ8223 |
4
TQ8223
PRELIMINARY DATA SHEET
External Clock VCO and PLL
The received clock can be either single-ended or
differential and is an AC coupled input on CKIN and
NCKIN. The external clock is selected as the active
clock if CLKSEL is tied to VEE. VOSC and VTUNE must
be tied to VEE when using an external VCO. If the
external clock is single ended the unused input must be
externally terminated through a capacitor to an AC
ground. The internal NRZ phase detector generates
Figure 2. PLL and Lock Detector Block Diagram
PLLVDD
VTUNE
VTUNEO
VCO
VOSC
HCKOUT
CLOCK
DIVIDER
LOCK
DETECT
CK38
HINTCLK
(N)DIN
Up
Up
Dn
Dn
LOCK
UP
DOWN
CHARGE
PUMP
PHASE
DETECT
PHASE
FREQ
DETECT
LOCKREF
2 : 1
2 : 1
PHREF and DCREF which, when connected to an
external integrator, may be used to tune the external
VCO.
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