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參數資料
| 型號： | TRC1300D |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 搖控器 |
| 英文描述： | RF, REMOTE CONTROL SUPPORT CIRCUIT, PDSO14 |
| 封裝： | PLASTIC, SO-14 |
| 文件頁數： | 13/27頁 |
| 文件大小： | 358K |
| 代理商： | TRC1300D |
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TRC1300, TRC1315
MARCSTAR
I E/D
REMOTE CONTROL ENCODER/DECODERS
SLWS011D – AUGUST 1996 – REVISED JANUARY 1997
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
oscillator
An internal variable-rate clock runs at the SCLK (sample clock) frequency, and is adjustable from 5 kHz to
50 kHz. DCLK (data clock) is derived from SCLK so that both clocks are synchronous. DCLK runs at one-tenth
the speed of SCLK and clocks the transmitted data at a rate variable from 500 bps to 5 kbps. SCLK is used to
sample the received data at 10 times the received data rate. The high sampling rate in the decoder combined
with the symbol code format and the internal signal-conditioning amplifier circuitry provides accurate correlation
of the received signal. The SCLK frequency is set by an external RC at terminals OSCR and OSCC.
The encoder and decoder should be set to the same clock rates; however, the device allows a wide frequency
tolerance to increase the robustness of the communications link. The encoder can vary from one-half to two
times the decoder clock speed and synchronization still results. This allows for internal oscillator tolerance and
frequency change due to external component tolerances and temperature changes. For example, if a serial data
speed of 1.5 kbps (DCLK) is desired, then both the encoder and the decoder oscillators (SCLK) must be set
to be 10 times the data rate frequency, or 15 kHz. Both the encoder and decoder can vary
±33% in frequency,
or from 10 kHz to 20 kHz, and the devices still synchronize successfully. For the worst case example, the
encoder SCLK would be running at 10 kHz and the decoder SCLK at 20 kHz, or twice the encoder frequency.
The absolute maximum and minimum clock frequency of 5 kHz to 50 kHz must never be violated. Because the
device introduces up to
±7% frequency variation, the external RC components can have as much as ±26%
tolerance, for a total of
±33% frequency variation.
The encoder and decoder internal SCLK clock rate is set by connecting a resistor between the OSCR and OSCC
terminals and an optional capacitor between the OSCC terminal and GND on each device. Equation 3 defines
the internal sample clock (SCLK) as a function of the external resistor and capacitor.
f
osc +
1
1.386
R
ext
) 2
10
3
C
ext
) 20
10
–12
(3)
The 2
× 103 value (2 k) shown in equation 3 is the internal series resistance with OSCR. The
20
× 10–12 value (20 pF) is the internal capacitance value of the OSCC bond pad (a parasitic shunt capacitance
to GND). Figure 8 shows typical Rext values vs. SCLK frequency.
12
16
20
24
28
32
36
40
44
48
52
56
60
64
0
10
20
30
40
50
f–
Frequency
–
kHz
Rext – External Resistance – k
Cext = 0.001 F
Figure 8. External Resistance vs. Sample Clock Frequency (SCLK)
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TRC1300N | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TRC1315 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:MARCSTAR I E/D REMOTE CONTROL ENCODER/DECODERS |
| TRC1315D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TRC1315N | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TRC1331S-501 | 功能描述:LED TRIPLE 1.1W COOL WHITE 30DEG RoHS:是 類別:光電元件 >> LED - 高亮度電源模塊 系列:1W-型 標準包裝:36 系列:5027 TFFC STAR K2 顏色:暖白色 配置:星形 在特定電流下的光通量 - 測試:75lm 電流 - 測試:350mA 電流 - 最大:1.5A 帶連接器:無 驅動器電路:無 波長:- 電壓:- |
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