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參數(shù)資料
型號: TRF3761-KIRHAR
廠商: TEXAS INSTRUMENTS INC
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 104 MHz, PQCC40
封裝: PLASTIC, QFN-40
文件頁數(shù): 1/55頁
文件大小: 1480K
代理商: TRF3761-KIRHAR
www.ti.com
FEATURES
APPLICATIONS
TRF3761
(TOP VIEW)
GND
AVDD_BIAS
RBIAS1
GND
VCTRL_IN
AVDD_VCO
AVDD_BUF
AVDD_CAPARRAY
GND
AVDD
(SeeNote A)
PD_OUTBUF
CHIP_EN
CLOCK
DATA
STROBE
DGND
DVDD1
AVDD_PRES
GND
DVDD2
MUX_OUT
REF_IN
GND
A
VDD_REF
A
VDD_CP
CPOUT
GND
A
VDD
GND
VCO_OUTP
VCO_OUTM
A
VDD_OUTBUF
GND
A
VDD_VCOBUF
EXT_VCO_IN
RBIAS2
GND
1
2
3
4
5
6
7
8
9
10
30
29
28
27
26
25
24
23
22
21
38
39
40
37
36
35
34
33
32
31
13
12
11
14
15
16
17
18
19
20
T
oMicrocontroller
T
oMicrocontroller
REF
C4
1000pF
R3
2.37k
C1
R1
C2
C3
R2
C6
10pF
C5
10pF
R5
120
R6
120
VDD
LOAD
C7
1000pF
R4
4.75k
DESCRIPTION
SLWS181F – OCTOBER 2005 – REVISED JANUARY 2007
INTEGER-N PLL WITH INTEGRATED VCO
Fully Integrated VCO
Low Phase Noise: –137dBc/Hz (at 600kHz, f
VCO
of 1.9GHz )
Low Noise Floor: –158dBc/Hz at 10MHz Offset
Integer-N PLL
Input Reference Frequency range: 10MHz to
104MHz
VCO Frequency Divided by 2-4 Output
Output Buffer Enable Pin
Programmable Charge Pump Current
Hardware and Software Power Down
3-Wire Serial Interface
Single Supply: 4.5V to 5.25V Operation
Wireless Infrastructure
WCDMA, CDMA, GSM
Wideband Transceivers
Wireless Local Loop
RFID Transceivers
A.
See the Application Information section for
Clock generation
Loop Filter Design procedures.
IF LO generation
AVAILABLE DEVICE OPTIONS
Div by 1
Div by 2
Div by 4
PART NUMBER
Fstart
Fstop
Fstart
Fstop
Fstart
Fstop
TRF3761-A
1493
1608
746.5
804
373.25
402
TRF3761-B
1595
1711
797.5
855.5
398.75
427.75
TRF3761-C
1660
1790
830
895
415
447.5
TRF3761-D
1740
1866
870
933
435
466.5
TRF3761-E
1805
1936
902.5
968
451.25
484
TRF3761-F
1850
1984
925
992
462.5
496
TRF3761-G
1920
2059
960
1029.5
480
514.75
TRF3761-H
2028
2175
1014
1087.5
507
543.75
TRF3761-J
2140
2295
1070
1147.5
535
573.75
TRF3761-K
2225
2386
1112.5
1193
556.25
596.5
TRF3761 is a family of high performance, highly integrated frequency synthesizers, optimized for high
performance applications. The TRF3761 includes a low-noise, voltage-controlled oscillator (VCO) and an
integer-N PLL.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2005–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
相關(guān)PDF資料
PDF描述
TRF3761IRHAR PLL FREQUENCY SYNTHESIZER, 104 MHz, PQCC40
TRU050-GACCA16.384-8.192 PHASE LOCKED LOOP, CDSO16
TRU050-GACFA33.330-16.665 PHASE LOCKED LOOP, CDSO16
TRU050-GACHA33.330-16.665 PHASE LOCKED LOOP, CDSO16
TRU050-GALCA33.330-16.665 PHASE LOCKED LOOP, CDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TRF3761-KIRHAT 制造商:TI 制造商全稱:Texas Instruments 功能描述:INTEGER-N PLL WITH INTEGRATED VCO
TRF3762 制造商:TI 制造商全稱:Texas Instruments 功能描述:INTEGER-N PLL WITH INTEGRATED VCO
TRF3762-E 制造商:TI 制造商全稱:Texas Instruments 功能描述:INTEGER-N PLL WITH INTEGRATED VCO
TRF3762-EIRHAR 功能描述:時鐘合成器/抖動清除器 Low Noise Integer N PLL Freq Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
TRF3762-EIRHARG4 功能描述:時鐘合成器/抖動清除器 Fractional PLL w/ Integ VCO RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
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