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參數(shù)資料
| 型號(hào)： | TS(X)8387MFB/C |
| 廠商： | ATMEL CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| 封裝： | 24 X 24 MM, CERAMIC, QFP-68 |
| 文件頁數(shù)： | 17/38頁 |
| 文件大小： | 617K |
| 代理商： | TS(X)8387MFB/C |
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TS8387
24/38
(TD)
Time Delay from
data to data ready
TD = TC2+ TDR – TOD
(Tc)
Encoding clock
period
Tc = Tc1 + Tc2 with Tc1 = Minimum clock pulse width (high).
with Tc2 = Minimum clock pulse width (low).
. . . . . . . . . . . . . .
(TPD)
Pipeline Delay
The number of clock cycles between the sampling edge of an input data and the
associated output data being made available, (not taking in account the TOD). For the
TS8387 the TPD is 2.5 clock periods.
(PSRR)
Power supply
rejection ratio
PSRR is the ratio of input offset variation to a change in power supply voltage.
(NRZ)
Non return to zero
When the input signal is larger than the upper bound of the ADC input range, the output
code is identical to the maximum code and the Out of Range bit is set at logic one. When
the input signal is smaller than the lower bound of the ADC input range, the output code
is identical to the minimum code, and the Out of range bit is set at logic one. (It is
assumed that the inut signal amplitude remains within the absolute maximum ratings).
(IMD)
InterModulation Dis-
tortion
The two tones intermodulation distortion ( IMD ) rejection is the ratio of either input tone
to the worst third order intermodulation products. The input tones levels are at – 7dB
Full Scale.
(NPR)
Noise Power Ratio
(to be defined)
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| TS8387MFDSSC/SMD | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS(X)8387CF | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS8387MF | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS8387CF | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
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