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參數(shù)資料
| 型號(hào)： | TS3A24159DGSR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | DUAL 2-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO10 |
| 封裝： | GREEN, PLASTIC, MSOP-10 |
| 文件頁數(shù)： | 20/25頁 |
| 文件大小： | 786K |
| 代理商： | TS3A24159DGSR |
www.ti.com
ELECTRICAL CHARACTERISTICS FOR 3-V SUPPLY
(1)
0.3-
DUAL SPDT ANALOG SWITCH
DUAL-CHANNEL 2:1 MULTIPLEXER/DEMULTIPLEXER
SCDS238C – MARCH 2007 – REVISED FEBRUARY 2008
V+ = 2.7 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal
VCOM, VNO,
0
V+
V
range
VNC
25
°C
0.2
0.3
Peak ON
0
≤ (VNO or VNC) ≤ V+,
Switch ON,
rpeak
2.7 V
resistance
ICOM = –100 mA,
See Figure 10
Full
0.35
25
°C
0.26
0.3
ON-state
VNO or VNC = 2 V,
Switch ON,
ron
2.7 V
resistance
ICOM = –100 mA,
See Figure 10
Full
0.34
ON-state
25
°C
0.01
0.05
VNO or VNC = 2 V, 0.8 V,
Switch ON,
resistance match
Δron
2.7 V
ICOM = –100 mA,
See Figure 10
Full
0.05
between channels
0
≤ (VNO or VNC) ≤ V+,
Switch ON,
25
°C
0.13
ICOM = –100 mA,
See Figure 10
ON-state
ron(flat)
2.7 V
resistance flatness
25
°C
0.01
0.04
VNO or VNC = 2 V, 0.8 V,
Switch ON,
ICOM = –100 mA,
See Figure 10
Full
0.05
NC, NO
VNC or VNO = 1 V, VCOM = 3 V,
25
°C
–10
10
INC(OFF),
Switch OFF,
OFF leakage
or
3.6 V
nA
INO(OFF)
See Figure 11
Full
–50
50
current
VNC or VNO = 3 V, VCOM = 1 V,
NC, NO
VNC or VNO = 1 V, VCOM = Open,
25
°C
–10
10
INC(ON),
Switch ON,
ON leakage
or
3.6 V
nA
INO(ON)
See Figure 12
Full
–100
100
current
VNC or VNO = 3 V, VCOM = Open,
COM
VNC or VNO = Open, VCOM = 1 V,
25
°C
–10
10
Switch ON,
ON leakage
ICOM(ON)
or
3.6 V
nA
See Figure 12
Full
–100
100
current
VNC or VNO = Open, VCOM = 3 V,
Digital Control Inputs (IN1, IN2)(2)
Input logic high
VIH
Full
1.4
V
Input logic low
VIL
Full
0.5
V
25
°C
–40
5
40
Input leakage
IIH, IIL
VI = 3.6 V or 0
3.6 V
nA
current
Full
–50
50
(1)
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2)
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
Copyright 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): TS3A24159
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