- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365958 > TS80C31X2-LCCD (TEMIC SEMICONDUCTORS) 8-bit CMOS Microcontroller 0-60 MHz PDF資料下載
參數(shù)資料
| 型號： | TS80C31X2-LCCD |
| 廠商： | TEMIC SEMICONDUCTORS |
| 英文描述： | 8-bit CMOS Microcontroller 0-60 MHz |
| 中文描述： | 8位CMOS微控制器0-60兆赫 |
| 文件頁數(shù)： | 19/40頁 |
| 文件大小： | 484K |
| 代理商： | TS80C31X2-LCCD |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
Rev. A - Mar. 19, 1999
19
Preliminary
TS80C31X2
Table 7. Priority Level Bit Values
A low-priority interrupt can be interrupted by a high priority interrupt, but not by another low-priority interrupt.
A high-priority interrupt can’t be interrupted by any other interrupt source.
If two interrupt requests of different priority levels are received simultaneously, the request of higher priority level
is serviced. If interrupt requests of the same priority level are received simultaneously, an internal polling sequence
determines which request is serviced. Thus within each priority level there is a second priority structure determined
by the polling sequence.
Table 8. IE Register
IE - Interrupt Enable Register (A8h)
7
Reset Value = 0XX0 0000b
Bit addressable
Table 9. IP Register
IPH.x
IP.x
Interrupt Level Priority
0
0
0 (Lowest)
0
1
1
1
0
2
1
1
3 (Highest)
6
5
4
3
2
1
0
EA
-
-
ES
ET1
EX1
ET0
EX0
Bit
Number
Bit
Mnemonic
Description
7
EA
Enable All interrupt bit
Clear to disable all interrupts.
Set to enable all interrupts.
If EA=1, each interrupt source is individually enabled or disabled by setting or clearing its own interrupt
enable bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
ES
Serial port Enable bit
Clear to disable serial port interrupt.
Set to enable serial port interrupt.
3
ET1
Timer 1 overflow interrupt Enable bit
Clear to disable timer 1 overflow interrupt.
Set to enable timer 1 overflow interrupt.
2
EX1
External interrupt 1 Enable bit
Clear to disable external interrupt 1.
Set to enable external interrupt 1.
1
ET0
Timer 0 overflow interrupt Enable bit
Clear to disable timer 0 overflow interrupt.
Set to enable timer 0 overflow interrupt.
0
EX0
External interrupt 0 Enable bit
Clear to disable external interrupt 0.
Set to enable external interrupt 0.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TS80C31X2-LCCR | 8-bit CMOS Microcontroller 0-60 MHz |
| TS80C31X2-LCEB | 8-bit CMOS Microcontroller 0-60 MHz |
| TS80C31X2-LCED | Jumper; Number of Contacts:4; Terminal Type:Screw |
| TS80C31X2-LCER | 8-bit CMOS Microcontroller 0-60 MHz |
| TS80C31X2-LIAB | 8-bit CMOS Microcontroller 0-60 MHz |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS80C31X2-LCCR | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit CMOS Microcontroller ROMless |
| TS80C31X2-LCE | 功能描述:IC MCU 8BIT 30/20MHZ 44-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:80C 標準包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲器容量:8KB（4K x 16） 程序存儲器類型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR) |
| TS80C31X2-LCEB | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:8-bit CMOS Microcontroller 0-60 MHz |
| TS80C31X2-LCED | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit CMOS Microcontroller ROMless |
| TS80C31X2-LCER | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:8-bit CMOS Microcontroller 0-60 MHz |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。