- 您現在的位置：買賣IC網 > PDF目錄365960 > TS80C31X2-VLAD (ATMEL CORP) 8-bit CMOS Microcontroller ROMless PDF資料下載
參數資料
| 型號： | TS80C31X2-VLAD |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-bit CMOS Microcontroller ROMless |
| 中文描述： | 8-BIT, 40 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數： | 6/40頁 |
| 文件大小： | 484K |
| 代理商： | TS80C31X2-VLAD |
第1頁第2頁第3頁第4頁第5頁當前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
6
Rev. A - Mar. 19, 1999
Preliminary
TS80C31X2
6. TS80C31X2 Enhanced Features
In comparison to the original 80C31, the TS80C31X2 implements some new features, which are
:
The X2 option.
The Dual Data Pointer.
The 4 level interrupt priority system.
The power-off flag.
The ONCE mode.
Enhanced UART
6.1 X2 Feature
The TS80C31X2 core needs only 6 clock periods per machine cycle. This feature called ”X2” provides the following
advantages:
G
Divide frequency crystals by 2 (cheaper crystals) while keeping same CPU power.
G
Save power consumption while keeping same CPU power (oscillator power saving).
G
Save power consumption by dividing dynamically operating frequency by 2 in operating and idle modes.
G
Increase CPU power by 2 while keeping same crystal frequency.
In order to keep the original C51 compatibility, a divider by 2 is inserted between the XTAL1 signal and the main
clock input of the core (phase generator). This divider may be disabled by software.
6.1.1 Description
The clock for the whole circuit and peripheral is first divided by two before being used by the CPU core and
peripherals. This allows any cyclic ratio to be accepted on XTAL1 input. In X2 mode, as this divider is bypassed,
the signals on XTAL1 must have a cyclic ratio between 40 to 60%. Figure 1. shows the clock generation block
diagram. X2 bit is validated on XTAL1
÷
2 rising edge to avoid glitches when switching from X2 to STD mode.
Figure 2. shows the mode switching waveforms.
Figure 1. Clock Generation Diagram
XTAL1
2
CKCON reg
X2
state machine: 6 clock cycles.
CPU control
F
OSC
F
XTAL
0
1
XTAL1:2
相關PDF資料 |
PDF描述 |
|---|---|
| TS80C31X2-VLAR | 8-bit CMOS Microcontroller ROMless |
| TS80C31X2-VLBB | 8-bit CMOS Microcontroller ROMless |
| TS80C31X2-VLBD | 8-bit CMOS Microcontroller ROMless |
| TS80C31X2-VLBR | 8-bit CMOS Microcontroller ROMless |
| TS80C31X2-VLCB | 8-bit CMOS Microcontroller ROMless |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TS80C31X2-VLAR | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit CMOS Microcontroller ROMless |
| TS80C31X2-VLBB | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit CMOS Microcontroller ROMless |
| TS80C31X2-VLBD | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit CMOS Microcontroller ROMless |
| TS80C31X2-VLBR | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit CMOS Microcontroller ROMless |
| TS80C31X2-VLCB | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit CMOS Microcontroller ROMless |
發布緊急采購，3分鐘左右您將得到回復。