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參數資料
| 型號： | TS83148VS |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數： | 5/16頁 |
| 文件大?。?/td> | 551K |
| 代理商： | TS83148VS |
TS83148
13/16
18.6. OPERATING DESCRIPTION
H Analog input signal
The analog input signal can be connected directly to the TS83148 A/D Z4 via the connector J12 (set a jumper on E3-23).
H Clock input signal
The clock signal input CLK1 drives directly the 83148 A/D Z4 at the SMA connector J9. If the jumper on E7 is removed,
this clock signal drives also the 74F574 latches Z7 and Z10 and the AD9721 DAC Z1.
If the jumper on E7 is on place, the CLK1 clock drives only the TS83148 A/D Z4. It is necessary to have an other clock
signal input CLK2 at the SMA connector J8 to drive the 74F574 latches Z7 and Z10 and the AD9721 DAC Z1.
H Voltage reference
There are two options for this voltage reference. The first option is to use the A/D internal voltage reference : place a
jumper on E4-1.
The second option is to use an external + 2.5 V reference. This voltage is adjustable by the RC1 potentiometer, and
observable on the testpoint PT1 : place a jumper on E4-2.
H Data outputs and reconstructed output
The A/D latched data are buffered by two 74F541 packages Z8 and Z12, and there are delivered on the connector J13.
The AD9721 DAC Z1 reconstructs the analog signal DACOUT which can be observed at the SMA connector J7.
18.7. OPERATING PROCEDURE
Connect the power supplies (VEE, AVCC, VCC) through the banana plug connector :
- J1, J12 for GROUND ;
- J2 for VEE (–5.2 V) (only if a reconstruction DAc is used);
- J3 for AVCC (+5.0 V) ;
- J4 for VCC (+5.0 V).
Connect the clock signal.
For optimum performance at high encode rate and high frequency analog inputs, it is necessary that the clocks input
have fast slew rate and low jitters.
Connect the analog signal.
Any type of signal within the reference voltage range and the frequency specifications can be send on the SMA connec-
tor J10.
Connect an oscilloscope.
The reconstructed signal available on the SMA connector J6 must be connected to an oscilloscope with a bandwidth
greater than 300 MHz.
Connect a high speed data acquisition system.
The best method to really evaluate the A/D is to make a signal computation on the digital data. To do, we recommend to
connect a high speed and high impedance logic analyzer probes on connector J5 where data are available.
18.8. JUMPER SETTING
E7 select the clock for the 74F574 latches and the AD9721 DAC :
- if E7 is on, the clock CLK2 drive the latches,
- if E7 is off, the clock CLK1 drive the latches.
E2 select the reference voltage for A/D :
- If E4-1, the A/D internal reference voltage is used,
- if E4-2, the external reference voltage is adjustable by the RC1 potentiometer on the testpoint PT1.
E3 select the input of the ADC :
- E3-1 : input connected to J10,
- E3-2 : input connected to VREF (used for locked histogram).
E5, E6 place jumpers for the evaluation of TS83148, remove jumpers for the evaluation of TS83110.
18.9. ADJUSTMENT
RC1 potentiometer must be adjustable at the 2.5 V value on the testpoint PT1.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TS831-4I | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MICROPOWER VOLTAGE SUPERVISOR RESET ACTIVE LOW |
| TS831-4ID | 功能描述:監控電路 4.50V Micropower AL RoHS:否 制造商:STMicroelectronics 監測電壓數: 監測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TS831-4ID | 制造商:STMicroelectronics 功能描述:IC SUPPLY MONITOR SMD SOIC8 831 |
| TS831-4IDT | 功能描述:監控電路 4.50V Micropower AL RoHS:否 制造商:STMicroelectronics 監測電壓數: 監測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TS831-4IP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MICROPOWER VOLTAGE SUPERVISOR RESET ACTIVE LOW |
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