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參數資料
| 型號： | TS8388BMFB/Q |
| 廠商： | E2V TECHNOLOGIES PLC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁數： | 3/62頁 |
| 文件大小： | 1267K |
| 代理商： | TS8388BMFB/Q |
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11
0860E–BDC–05/07
e2v semiconductors SAS 2007
TS8388B
5.5
Explanation of Test Levels
Notes:
1. Unless otherwise specified, all tests are pulsed tests: therefore TJ = Tc = Tamb, where TJ, Tc and TA are
junction, case and ambient temperature respectively.
2. Refer to “Ordering Information” on page 52.
3. Only MIN and MAX values are guaranteed (typical values are issuing from characterization results).
5.6
Functions Description
Table 5-4.
Explanation of Test Levels
No.
Characteristics
1
100% production tested at +25
2
100% production tested at +25
°C(1), and sample tested at specified temperatures
(for “V” and “M” Temperature range(2)).
3
Sample tested only at specified temperatures.
4
Parameter is guaranteed by design and characterization testing (thermal steady-state
conditions at specified temperature).
5
Parameter is a typical value only.
6
100% production tested over specified temperature range
(for “B/Q” Temperature range(2)).
Table 5-5.
Functions Description
Name
Function
V
CC
Positive power supply
VEE
Analog negative power supply
V
PLUSD
Digital positive power supply
GND
Ground
VIN, VINB
Differential analog inputs
CLK, CLKB
Differential clock inputs
<D0:D7>
<D0B:D7B>
Differential output data port
DR, DRB
Differential data ready outputs
OR, ORB
Out of range outputs
GAIN
ADC gain adjust
GORB
Gray or Binary digital output select
DIOD/DRRB
Die junction temperature measurement/
asynchronous data ready reset
VIN
VINB
CLK
CLKB
D0
D7
D0B
D7B
16
DVEE = -5V
VCC = +5V
VPLUSD = +0V (ECL)
VPLUSD = +2.4V (LVDS)
TS8388B
VEE = -5V
GND
GAIN
GORG
DIOD/
DRRB
OR
ORB
DR
DRB
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