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參數(shù)資料
型號(hào): TS8388BMFS9QB2ZB9
廠商: ATMEL CORP
元件分類: ADC
英文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
封裝: CERAMIC, QFP-68
文件頁(yè)數(shù): 29/43頁(yè)
文件大?。?/td> 825K
代理商: TS8388BMFS9QB2ZB9
TS8388BFS
35/42
Preliminary Beta Site
7.8.
OUT OF RANGE BIT
An Out of Range (OR,ORB) bit is provided that goes to logical high state when the input exceeds the positive full scale or falls below the
negative full scale.
When the analog input exceeds the positive full scale, the digital output datas remain at high logical state, with (OR,ORB) at logical one.
When the analog input falls below the negative full scale, the digital outputs remain at logical low state, with (OR,ORB) at logical one again.
7.9.
GRAY OR BINARY OUTPUT DATA FORMAT SELECT
The TS8388BFS internal regeneration latches indecision (for inputs very close to latches threshold) may produce errors in the logic encoding
circuitry and leading to large amplitude output errors.
This is due to the fact that the latches are regenerating the internal analog residues into logical states with a finite voltage gain value (Av) within
a given positive amount of time
(t) :
Av= exp(
(t)/τ) , with τ the positive feedback regeneration time constant.
The TS8388BFS has been designed for reducing the probability of occurence of such errors to approximately 10
-13 (targetted for the
TS8388BFS at 1GSPS).
A standard technique for reducing the amplitude of such errors down to +/-1 LSB consists to output the digital datas in Gray code format.
Though the TS8388BFS has been designed for featuring a Bit Error Rate of 10
-13 with a binary output format, it is possible for the user to select
between the Binary or Gray output data format, in order to reduce the amplitude of such errors when occuring, by storing Gray output codes.
Digital Datas format selection :
BINARY output format if GORB is floating or VCC.
GRAY output format if GORB is connected to ground (0V).
7.10. DIODE PIN 49
One single pin is used for both DRRB input command and die junction monitoring. The pin denomination is DRRB/DIOD. Temperature
monitoring and Data Ready control by DRRB is not possible simultaneously.
(See section 7.2 for Data Ready Reset input command).
The operating die junction temperature must be kept below145
°C, therefore an adequate cooling system has to be set up.
The diode mounted transistor measured Vbe value versus junction temperature is given below.
600
640
680
720
760
800
840
880
920
960
1000
-55
-35
-15
5
25
45
65
85
105
125
Junction temperature (deg.C)
VBE
(mV)
相關(guān)PDF資料
PDF描述
TS8388BCFS9QC1ZB9 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
TS8388BMFS9QB2ZB9 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
TS8388BMFS9QB3ZB9 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
TS8388BMFS9QC3ZB9 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
TS8388BCFS9NB3ZB9 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68
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